66AK2G12: 66AK2G12 PCIe clock input termination

Srikanth Kacchu1

Part Number: 66AK2G12

We implemented the attached circuit for PCIe Clock input to 66AK2G12. Datasheet says the IO Voltage Value should be 1.8V and LVDS standard. But we connected 3.3V to termination resistors and to clock input device.

Can you please and provide feedback whether it will work or not?

Regards

Srikanth KacchuDSP_PCIE_CLK.pdf

over 5 years ago

0 Bill Taboada over 5 years ago

TI__Mastermind 42545 points

Hi Srikanth,

The termination of a clock buffer is generally defined by the buffer manufacturer. I can't comment on whether the termination you attached is correct. You will need to check with the buffer manufacturer to determine if the buffer termination will provide the voltages needed for a 1.8V LVDS input. Is there a reason you didn't use 1.8V for the termination circuit?

Regards, Bill

0 Bill Taboada over 5 years ago in reply to Bill Taboada

TI__Mastermind 42545 points

Hi Srikanth,

I haven't heard from you in awhile. I hope everything is well. If you have any other questions let me know.

Regards, Bill

0 Srikanth Kacchu1 over 5 years ago in reply to Bill Taboada

Expert 1255 points

Hi Bill

Thanks for the support.

Regards

Srikanth Kacchu

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66AK2G12: 66AK2G12 PCIe clock input termination