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TDA4VM: ECC support

Robert Finger
Genius 17527 points
Part Number: TDA4VM


Team,

Please elaborate what the statement in TRM chapter 8.2.1.1 DDRSS Not Supported Features means: The ECC engine of the DDR controller.

I think in-line ECC is fully supported, so what would the 'ECC engine' do? Would this be for an extra ECC memory chip?

Thanks,
  Robert

  • 0
    TI__Mastermind 38820 points

    Hi Robert,

    There are two implementations of ECC for the DDRSS, where one is supported and the other is not. I would have to confirm with the design team, but I believe one is implemented inside the controller logic (not supported), and one is implemented at the sub-system (top) level (supported). 

    Let me know if further information is needed at this time.

    Best regards,
    Kevin

  • 0 in reply to Kevin S
    TI__Genius 17527 points

    Thanks Kevin! 

    It might be good remove this from the TRM or to make it more clear. It's kind of confusing right now.

    Best regards,
      Robert