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Original question:

TDA2PHV-ACD: L3 Firewall

TDA2P: Write Back channel cause SYNCLOST1 error

Naresh Patel
Prodigy 230 points
Other Parts Discussed in Thread: SYSBIOS

Hello All,

Hello All,

We are using TDA2P Soc. 

In Display driver, we have configured VID1 pipeline to display live picture through LCD output.  We are using NV12 Video format to input VID1 Pipeline and output is RGB24. 

We also need to capture same LCD out and store in system memory. Hence we used Write Back pipeline to capture the display frame with capture mode and video format is RGB888.

Surprisingly, once we enable the WB pipeline, we got the SYNCLOST1 Error and lost the live picture on LCD display. By further debugging, we check the IRQ_STATUS register and found that we are getting 

WBUNCOMPLETEERROR_IRQ along with SYNCLOST1 IRQ. 

To overcome WBUNCOMPLETEERROR_IRQ error, we have set the DISPC_WB_ATTRIBUTES2[7:0] WBDELAYCOUNT bit field to maximum but unfortunately we got the same errors again. 

WE thought there will be timing issue and we change the WB configuring from CAPTURE to Memory to memory transfer, but unfortunately again the we got the SYNCLOST1 error without  WBUNCOMPLETEERROR_IRQ.

We even try different burst size and burst type in WB and VID1 config with different arbitration priority. We also used WB_MFLAG mechanism to avoid WBUNCOMPLETEERROR, but result is the same, SYNCLOST1.

Could you please help us and let us know what could be necessary to avoid this issue.

Best regards

Naresh 

  • 0
    TI__Guru**** 479795 points

    Hi Naresh,

    Please refer to WB-CRC usecase vision sdk and use WB pipeline accordingly. 

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 230 points

    HI Brijesh,

    Thank you so much for your prompt response.  

    Yes I will do that but this will be time consuming for us. Do you have anything in your mind on first glance what could be the wrong in configuration or what could be missed in init.

    Best regards, Naresh

  • 0 in reply to Naresh Patel
    TI__Guru**** 479795 points

    Hi Naresh,

    We also do have few examples in PDK in vision_sdk\ti_components\drivers\pdk_01_10_02_07\packages\ti\drv\vps\examples\dss\displayDssWb\src\DisplayDssWb_main.c. You could try and refer this example.

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 230 points

    Hi Brijesh,

    I have tried DisplayDSS eample code. While running the code I got below error. We running the code on our own TDA2p Board.  Please let me know What must be we need to modify so this example code will work on our ECU. 

    [Cortex_M4_IPU1_C0] DISP_DSS_APP: Sample Application - STARTS !!!
    ti.sysbios.family.arm.m3.Hwi: line 1105: E_hardFault: FORCED
    ti.sysbios.family.arm.m3.Hwi: line 1182: E_busFault: PRECISERR: Immediate Bus Fault, exact addr known, address: d1082800
    Exception occurred in background thread at PC = 0x800af426.
    Core 0: Exception occurred in ThreadType_Task.
    Task name: {unknown-instance-name}, handle: 0x80200008.
    Task stack base: 0x80272f80.
    Task stack size: 0x2800.
    R0 = 0x0000000c R8 = 0x8007ec86
    R1 = 0xd1082800 R9 = 0x00000000
    R2 = 0x00000000 R10 = 0xffffffff
    R3 = 0x00000001 R11 = 0xffffffff
    R4 = 0x00000000 R12 = 0x17e60300
    R5 = 0x8007eadc SP(R13) = 0x80275698
    R6 = 0x8007ead4 LR(R14) = 0x800cd9cb
    R7 = 0x8007ead8 PC(R15) = 0x800af426
    PSR = 0x01000000
    ICSR = 0x0440f803
    MMFSR = 0x00
    BFSR = 0x82
    UFSR = 0x0000
    HFSR = 0x40000000
    DFSR = 0x00000001
    MMAR = 0xd1082800
    BFAR = 0xd1082800
    AFSR = 0x00000000
    Terminating execution...

    Mfg, Naresh

  • 0 in reply to Naresh Patel
    Prodigy 230 points

    Hi Brijesh,

    I have debug the code further and found that Fvid2_create is returning a null pointer. No idea how it could happen. 

    Mfg, Naresh

  • 0 in reply to Naresh Patel
    Prodigy 230 points

    Hi Brijesh,

    While running DisplayDSS vision sdk code on our own ECU, we are not able to access the memory mapped register. I have attached debug image. 

    Best regards,

    Naresh

  • 0 in reply to Naresh Patel
    TI__Guru**** 479795 points

    Hi Naresh,

    How are you running this example? Are you running after loading and running gel files on A15? 

    Please note that without running 'OnTargetConnect' Option on A15 gel files, this example can't be run. This option powers on the modules and enables clock.. 

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 230 points

    Hello Brijesh,

    I am running the code on IPU1 C0. Yes, I am running by loading the gel files and running the script TDA2Px_MULTIPLECORES_EnableAllcores, OnTargetConnect and IPU1SSClkenable_API. Then Load the vps_examples_displayDssWb_ipu1_0_debug.xem4 on ipu1 c0. 

    This is the build command. 

     gmake -s vps_examples_displayDssWb BOARD=tda2px-evm CORE=ipu1_0 BUILD_PROFILE=debug

    Best regards,

    Nares