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TDA4VMXEVM: C7x Task_sleep issue

Part Number: TDA4VMXEVM


Hi~

    Recently I tried to test multi-task demo on C7x, but when I called Task_sleep(1000) interface, I found that C7x core sleeps only 500ms actually, it seems that the system timer of C7x isn't configured correctly, how can I configure the system timer of C7x to make this work normally?

  • Hi,


    Can you please let us know how you measured 500ms?

    Regards,
    Shyam

  • Hi,

        Thanks for reply.

        I read global time from CSL_GTC0_GTC_CFG1_COUNT1 register, when MCU2_0 / MCU2_1 / MCU3_0 / MCU3_1 / C66_1 / C66_2 calls Task_sleep(1000), the actual counter added in CSL_GTC0_GTC_CFG1_COUNT1 register is 1s, but when C7x_1 calls Task_sleep(1000),  the actual counter added in CSL_GTC0_GTC_CFG1_COUNT1 register is 500ms.

        Obviously, when I called Task_sleep(10000) to sleep 10s, the C7x sleep only 5s actually, it seems that the system timer is configured abnormally.

        Can you please tried to call Task_sleep interface in C7x demo of psdk_rtos_auto_j7_06_02_00_21? This issue is easily repeated.

  • Hi,

    I apologize for a very late reply. We acknowledge the issue and currently investigating it. We too are seeing that a Task_sleep(1000) is actually only 0.5s.
    Hope to get you an answer at the earliest.

    Regards,
    Shyam

  • Hi

    We root-caused the issue and found that the type of interrupt sent to C7x clock was incorrect. The expected type is a pulse interrupt but a level interrupt was provide. This is why the Task_sleep(1000) used to sleep only for 0.5s. Please not this affects only the Task_sleep() function but not he performance reported by the applications. As a workaround to this issue you can replace the main.c under location psdk_rtos_auto_j7_06_02_00_21/vision_apps/apps/basic_demos/app_tirtos/tirtos_linux/c7x_1/main.c with the attached one. The proper fix will be done in CSL for the next SDK release but for now this workaround should do.

    /*
     *
     * Copyright (c) 2018 Texas Instruments Incorporated
     *
     * All rights reserved not granted herein.
     *
     * Limited License.
     *
     * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
     * license under copyrights and patents it now or hereafter owns or controls to make,
     * have made, use, import, offer to sell and sell ("Utilize") this software subject to the
     * terms herein.  With respect to the foregoing patent license, such license is granted
     * solely to the extent that any such patent is necessary to Utilize the software alone.
     * The patent license shall not apply to any combinations which include this software,
     * other than combinations with devices manufactured by or for TI ("TI Devices").
     * No hardware patent is licensed hereunder.
     *
     * Redistributions must preserve existing copyright notices and reproduce this license
     * (including the above copyright notice and the disclaimer and (if applicable) source
     * code license limitations below) in the documentation and/or other materials provided
     * with the distribution
     *
     * Redistribution and use in binary form, without modification, are permitted provided
     * that the following conditions are met:
     *
     * *       No reverse engineering, decompilation, or disassembly of this software is
     * permitted with respect to any software provided in binary form.
     *
     * *       any redistribution and use are licensed by TI for use only with TI Devices.
     *
     * *       Nothing shall obligate TI to provide you with source code for the software
     * licensed and provided to you in object code.
     *
     * If software source code is provided to you, modification and redistribution of the
     * source code are permitted provided that the following conditions are met:
     *
     * *       any redistribution and use of the source code, including any resulting derivative
     * works, are licensed by TI for use only with TI Devices.
     *
     * *       any redistribution and use of any object code compiled from the source code
     * and any resulting derivative works, are licensed by TI for use only with TI Devices.
     *
     * Neither the name of Texas Instruments Incorporated nor the names of its suppliers
     *
     * may be used to endorse or promote products derived from this software without
     * specific prior written permission.
     *
     * DISCLAIMER.
     *
     * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
     * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
     * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
     * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
     * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
     * OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     */
    
    #include <app.h>
    #include <utils/console_io/include/app_log.h>
    #include <utils/misc/include/app_misc.h>
    #include <stdio.h>
    #include <string.h>
    #include <xdc/runtime/Error.h>
    #include <ti/sysbios/BIOS.h>
    #include <ti/sysbios/knl/Task.h>
    #include <ti/sysbios/family/c7x/Hwi.h>
    #include <app_mem_map.h>
    #include <app_ipc_rsctable.h>
    #include <ti/csl/soc.h>
    #include <ti/csl/csl_clec.h>
    
    static Void appMain(UArg arg0, UArg arg1)
    {
        appInit();
        appRun();
        #if 1
        while(1)
        {
            appLogWaitMsecs(100u);
        }
        #else
        appDeInit();
        #endif
    }
    
    void StartupEmulatorWaitFxn (void)
    {
        volatile uint32_t enableDebug = 0;
        do
        {
        }while (enableDebug);
    }
    
    /* To set C71 timer interrupts */
    void appTimerInterruptInit(void)
    {
        CSL_ClecEventConfig   cfgClec;
        CSL_CLEC_EVTRegs     *clecBaseAddr = (CSL_CLEC_EVTRegs*)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
    
        uint32_t input         = 1249; /* Used for Timer Interrupt */
        uint32_t corepackEvent = 15;
    
        /* Configure CLEC */
        cfgClec.secureClaimEnable = FALSE;
        cfgClec.evtSendEnable     = TRUE;
        cfgClec.rtMap             = CSL_CLEC_RTMAP_CPU_ALL;
        cfgClec.extEvtNum         = 0;
        cfgClec.c7xEvtNum         = corepackEvent;
        CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
        Hwi_setPriority(corepackEvent, 1);
    }
    
    /* IMPORTANT NOTE: For C7x,
     * - stack size and stack ptr MUST be 8KB aligned
     * - AND min stack size MUST be 16KB
     * - AND stack assigned for task context is "size - 8KB"
     *       - 8KB chunk for the stack area is used for interrupt handling in this task context
     */
    static uint8_t gTskStackMain[64*1024]
    __attribute__ ((section(".bss:taskStackSection")))
    __attribute__ ((aligned(8192)))
        ;
    
    int main(void)
    {
        Task_Params tskParams;
        Error_Block eb;
        Task_Handle task;
    
        /* move C7x to non-secure mode, this is needed so that coherency
         * between A72 (which runs in non-secure mode) and C7x can be effective
         *
         * For this we need to init CLEC to allow non-secure to program it
         * after the switch
         * And then we switch C7x to non-secure mode
         */
        /* appC7xClecInitForNonSecAccess(); */
        /* appC7xSecSupv2NonSecSupv(); */
    
        appTimerInterruptInit();
    
        Error_init(&eb);
        Task_Params_init(&tskParams);
    
        tskParams.arg0 = (UArg) NULL;
        tskParams.arg1 = (UArg) NULL;
        tskParams.priority = 8u;
        tskParams.stack = gTskStackMain;
        tskParams.stackSize = sizeof (gTskStackMain);
        task = Task_create(appMain, &tskParams, &eb);
        if(NULL == task)
        {
            BIOS_exit(0);
        }
        BIOS_start();
    
        return 0;
    }
    
    #include <ti/sysbios/family/c7x/Mmu.h>
    
    void appMmuInit(void)
    {
        Bool            retVal;
        Mmu_MapAttrs    attrs;
    
        /* This is for debug purpose - see the description of function header */
        StartupEmulatorWaitFxn();
    
        Mmu_initMapAttrs(&attrs);
    
        attrs.attrIndx = Mmu_AttrIndx_MAIR0;
    
        retVal = Mmu_map(0x00000000, 0x00000000, 0x20000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x20000000, 0x20000000, 0x20000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x40000000, 0x40000000, 0x20000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x60000000, 0x60000000, 0x10000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x70000000, 0x70000000, 0x10000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        Mmu_initMapAttrs(&attrs);
    
        attrs.attrIndx = Mmu_AttrIndx_MAIR4;
    
        retVal = Mmu_map(APP_LOG_MEM_ADDR, APP_LOG_MEM_ADDR, APP_LOG_MEM_SIZE, &attrs);
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(TIOVX_OBJ_DESC_MEM_ADDR, TIOVX_OBJ_DESC_MEM_ADDR, TIOVX_OBJ_DESC_MEM_SIZE, &attrs);
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(IPC_VRING_MEM_ADDR, IPC_VRING_MEM_ADDR, IPC_VRING_MEM_SIZE, &attrs);
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_C7x_1_IPC_ADDR, DDR_C7x_1_IPC_ADDR, DDR_C7x_1_IPC_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR7;
        retVal = Mmu_map(0x70000000, 0x70000000, 0x00800000, &attrs); /* msmc  448KB      */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR7;
        retVal = Mmu_map(0x64800000, 0x64800000, 0x00200000, &attrs); /* L2 sram 448KB        */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        #if 0
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR0;
    
        retVal = Mmu_map(0x64E00000, 0x64E00000, 0x00200000, &attrs); /* L1D sram 16KB        */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
        #endif
    
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR7;
    
        retVal = Mmu_map(DDR_C7x_1_DTS_ADDR, DDR_C7x_1_DTS_ADDR, DDR_C7x_1_DTS_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_C7X_1_LOCAL_HEAP_ADDR, DDR_C7X_1_LOCAL_HEAP_ADDR, DDR_C7X_1_LOCAL_HEAP_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_C7X_1_SCRATCH_ADDR, DDR_C7X_1_SCRATCH_ADDR, DDR_C7X_1_SCRATCH_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_SHARED_MEM_ADDR, DDR_SHARED_MEM_ADDR, DDR_SHARED_MEM_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
    mmu_exit:
        if(retVal == FALSE)
        {
             printf(" ERROR: MMU init failed (status = %d) !!!", retVal);
        }
    
    
    
        return;
    }
    

  • Hi

    Thanks for reply, I compared the 8360.main.c file below with the main.c under location psdk_rtos_auto_j7_06_02_00_21/vision_apps/apps/basic_demos/app_tirtos/tirtos_linux/c7x_1/, these two files are the same, was the wrong file sent unexpectedly? Or can you describe the workaround way?

    Regards

  • Hi apologies,

    You will have basically define this static function appClecConfigEventLevel() and call it from void appTimerInterruptInit() function as below,

    /* TODO: remove this when this function use the one provided by CSL when available */
    static int32_t appClecConfigEventLevel(CSL_CLEC_EVTRegs *pRegs,
                                uint32_t evtNum,
                                uint32_t is_level)
    {
        int32_t     retVal = CSL_PASS;
        uint32_t    regVal;

        if((NULL == pRegs) ||
           (evtNum >= CSL_CLEC_MAX_EVT_IN) )
        {
            retVal = CSL_EFAIL;
        }
        else
        {
            /* Update is_lvl field (bit 24)
             */
            regVal = CSL_REG32_RD(&pRegs->CFG[evtNum].MRR);
            if(is_level==0)
            {
                regVal &= ~(1<<24);
            }
            else
            {
                regVal |= (1<<24);
            }
            CSL_REG32_WR(&pRegs->CFG[evtNum].MRR, regVal);
        }

        return (retVal);
    }

    void appTimerInterruptInit(void)

    {

    ...

        CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
        appClecConfigEventLevel(clecBaseAddr, input, 0); /* configure interrupt as pulse */
        Hwi_setPriority(corepackEvent, 1);

    }

    /*
     *
     * Copyright (c) 2018 Texas Instruments Incorporated
     *
     * All rights reserved not granted herein.
     *
     * Limited License.
     *
     * Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
     * license under copyrights and patents it now or hereafter owns or controls to make,
     * have made, use, import, offer to sell and sell ("Utilize") this software subject to the
     * terms herein.  With respect to the foregoing patent license, such license is granted
     * solely to the extent that any such patent is necessary to Utilize the software alone.
     * The patent license shall not apply to any combinations which include this software,
     * other than combinations with devices manufactured by or for TI ("TI Devices").
     * No hardware patent is licensed hereunder.
     *
     * Redistributions must preserve existing copyright notices and reproduce this license
     * (including the above copyright notice and the disclaimer and (if applicable) source
     * code license limitations below) in the documentation and/or other materials provided
     * with the distribution
     *
     * Redistribution and use in binary form, without modification, are permitted provided
     * that the following conditions are met:
     *
     * *       No reverse engineering, decompilation, or disassembly of this software is
     * permitted with respect to any software provided in binary form.
     *
     * *       any redistribution and use are licensed by TI for use only with TI Devices.
     *
     * *       Nothing shall obligate TI to provide you with source code for the software
     * licensed and provided to you in object code.
     *
     * If software source code is provided to you, modification and redistribution of the
     * source code are permitted provided that the following conditions are met:
     *
     * *       any redistribution and use of the source code, including any resulting derivative
     * works, are licensed by TI for use only with TI Devices.
     *
     * *       any redistribution and use of any object code compiled from the source code
     * and any resulting derivative works, are licensed by TI for use only with TI Devices.
     *
     * Neither the name of Texas Instruments Incorporated nor the names of its suppliers
     *
     * may be used to endorse or promote products derived from this software without
     * specific prior written permission.
     *
     * DISCLAIMER.
     *
     * THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
     * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     * IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
     * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
     * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
     * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
     * OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     */
    
    #include <app.h>
    #include <utils/console_io/include/app_log.h>
    #include <utils/misc/include/app_misc.h>
    #include <stdio.h>
    #include <string.h>
    #include <xdc/runtime/Error.h>
    #include <ti/sysbios/BIOS.h>
    #include <ti/sysbios/knl/Task.h>
    #include <ti/sysbios/family/c7x/Hwi.h>
    #include <app_mem_map.h>
    #include <app_ipc_rsctable.h>
    #include <ti/csl/soc.h>
    #include <ti/csl/csl_clec.h>
    
    static Void appMain(UArg arg0, UArg arg1)
    {
        appInit();
        appRun();
        #if 1
        while(1)
        {
            appLogWaitMsecs(100u);
        }
        #else
        appDeInit();
        #endif
    }
    
    void StartupEmulatorWaitFxn (void)
    {
        volatile uint32_t enableDebug = 0;
        do
        {
        }while (enableDebug);
    }
    
    /* To set C71 timer interrupts */
    void appTimerInterruptInit(void)
    {
        CSL_ClecEventConfig   cfgClec;
        CSL_CLEC_EVTRegs     *clecBaseAddr = (CSL_CLEC_EVTRegs*)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE;
    
        uint32_t input         = 1249; /* Used for Timer Interrupt */
        uint32_t corepackEvent = 15;
    
        /* Configure CLEC */
        cfgClec.secureClaimEnable = FALSE;
        cfgClec.evtSendEnable     = TRUE;
        cfgClec.rtMap             = CSL_CLEC_RTMAP_CPU_ALL;
        cfgClec.extEvtNum         = 0;
        cfgClec.c7xEvtNum         = corepackEvent;
        CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
        Hwi_setPriority(corepackEvent, 1);
    }
    
    /* IMPORTANT NOTE: For C7x,
     * - stack size and stack ptr MUST be 8KB aligned
     * - AND min stack size MUST be 16KB
     * - AND stack assigned for task context is "size - 8KB"
     *       - 8KB chunk for the stack area is used for interrupt handling in this task context
     */
    static uint8_t gTskStackMain[64*1024]
    __attribute__ ((section(".bss:taskStackSection")))
    __attribute__ ((aligned(8192)))
        ;
    
    int main(void)
    {
        Task_Params tskParams;
        Error_Block eb;
        Task_Handle task;
    
        /* move C7x to non-secure mode, this is needed so that coherency
         * between A72 (which runs in non-secure mode) and C7x can be effective
         *
         * For this we need to init CLEC to allow non-secure to program it
         * after the switch
         * And then we switch C7x to non-secure mode
         */
        /* appC7xClecInitForNonSecAccess(); */
        /* appC7xSecSupv2NonSecSupv(); */
    
        appTimerInterruptInit();
    
        Error_init(&eb);
        Task_Params_init(&tskParams);
    
        tskParams.arg0 = (UArg) NULL;
        tskParams.arg1 = (UArg) NULL;
        tskParams.priority = 8u;
        tskParams.stack = gTskStackMain;
        tskParams.stackSize = sizeof (gTskStackMain);
        task = Task_create(appMain, &tskParams, &eb);
        if(NULL == task)
        {
            BIOS_exit(0);
        }
        BIOS_start();
    
        return 0;
    }
    
    #include <ti/sysbios/family/c7x/Mmu.h>
    
    void appMmuInit(void)
    {
        Bool            retVal;
        Mmu_MapAttrs    attrs;
    
        /* This is for debug purpose - see the description of function header */
        StartupEmulatorWaitFxn();
    
        Mmu_initMapAttrs(&attrs);
    
        attrs.attrIndx = Mmu_AttrIndx_MAIR0;
    
        retVal = Mmu_map(0x00000000, 0x00000000, 0x20000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x20000000, 0x20000000, 0x20000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x40000000, 0x40000000, 0x20000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x60000000, 0x60000000, 0x10000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(0x70000000, 0x70000000, 0x10000000, &attrs);
        if(retVal==FALSE)
        {
            goto mmu_exit;
        }
    
        Mmu_initMapAttrs(&attrs);
    
        attrs.attrIndx = Mmu_AttrIndx_MAIR4;
    
        retVal = Mmu_map(APP_LOG_MEM_ADDR, APP_LOG_MEM_ADDR, APP_LOG_MEM_SIZE, &attrs);
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(TIOVX_OBJ_DESC_MEM_ADDR, TIOVX_OBJ_DESC_MEM_ADDR, TIOVX_OBJ_DESC_MEM_SIZE, &attrs);
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(IPC_VRING_MEM_ADDR, IPC_VRING_MEM_ADDR, IPC_VRING_MEM_SIZE, &attrs);
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_C7x_1_IPC_ADDR, DDR_C7x_1_IPC_ADDR, DDR_C7x_1_IPC_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR7;
        retVal = Mmu_map(0x70000000, 0x70000000, 0x00800000, &attrs); /* msmc  448KB      */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR7;
        retVal = Mmu_map(0x64800000, 0x64800000, 0x00200000, &attrs); /* L2 sram 448KB        */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        #if 0
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR0;
    
        retVal = Mmu_map(0x64E00000, 0x64E00000, 0x00200000, &attrs); /* L1D sram 16KB        */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
        #endif
    
        Mmu_initMapAttrs(&attrs);
        attrs.attrIndx = Mmu_AttrIndx_MAIR7;
    
        retVal = Mmu_map(DDR_C7x_1_DTS_ADDR, DDR_C7x_1_DTS_ADDR, DDR_C7x_1_DTS_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_C7X_1_LOCAL_HEAP_ADDR, DDR_C7X_1_LOCAL_HEAP_ADDR, DDR_C7X_1_LOCAL_HEAP_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_C7X_1_SCRATCH_ADDR, DDR_C7X_1_SCRATCH_ADDR, DDR_C7X_1_SCRATCH_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
        retVal = Mmu_map(DDR_SHARED_MEM_ADDR, DDR_SHARED_MEM_ADDR, DDR_SHARED_MEM_SIZE, &attrs); /* ddr            */
        if(retVal == FALSE)
        {
            goto mmu_exit;
        }
    
    mmu_exit:
        if(retVal == FALSE)
        {
             printf(" ERROR: MMU init failed (status = %d) !!!", retVal);
        }
    
    
    
        return;
    }