This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA2P-ACD: Questions on CAL Write DMA MFlag settings during real time traffic

Part Number: TDA2P-ACD

Hello!

I have a few questions regarding the MFLag settings on the CAL Write DMA with real time traffic. See chapter 10.4.6.8.7 of the TRM. The chapter says, that dynamic MFlag generation is to be used on real time traffic. It states "MFlag value depends on the number of slots (n) ready to generate transactions in the Write DMA:"

  1. What is the total number of available slots?
  2. How do I best determine the values for MFLAGL and MFLAGH?
  3. Where are MFlag settings evaluated to prioritize the traffic from CAL?

Thank you and Kind regards, 

Tobias

  • Tobias,

    I think there are 15 slots available and it can be set in the CAL registers.

    I think by default MFlag is enabled for CAL write DMA.

    Rgds,

    Brijesh  

  • Hello Brijesh,

    Thank you for your answer!


    Can you give a more detailed answer to the questions 2 and 3 from above? That'd be much appreciated!

    Regards,

    Tobias

  • Hi Tobias,

    Please refer to CAL Write DMA Real Time Traffic section for these questions.

    Rgds,

    Brijesh

  • Hello Brijesh,

    the section unfortunately does not help me in my understanding to the two questions (2,3) above.

    For question 2: The chapter only states the restrictions for the MFLAGL and MFLAGH and how they are evaluated (Not where, that's why I am asking question 3). There are no recommendations on how they should be set though, that is why I am asking.

    Using recommendations in other chapters, I would say if 50% of slots are used, the condition should be VULNERABLE (MFlag = 01) and if 75% are used, the condition should be ENDAGERED (MFlag = 11). This would put MFLAGL to 7 (50% rounded down) and MFLAGH to 11 (75% rounded down). Would this be a good solution?

    For question 3: There is not any information in the chapter, where the generated MFlag (00, 01 or 11) is evaluated

    Your help would be much appreciated!

    Kind regards,

    Tobias

  • Hi Tobias,

    For #2, driver takes care of correct configuring the high and low threshold. Are you seeing any issue with this configuration? Could you please help understand the problem that you are facing?

    For #3, Please refer to CAL driver, i think it is documented in CAL driver.

    Rgds,

    Brijesh

  • Hi Brijesh,

    I am not using any SDK/PDK driver, but have looked at the implementation over there. In the PDK, the user must set the values based on the users need. In the PDK example, MFLAGL is set to 6 and MFLAGH is set to 10, but why that is, is confusing, as somehow the number of DMA contexts is brought into it. Then the values are set to 6 and 10 without explanation.

    The comments for the data structure state "please refer spec for details while capturing real time data.". But if this referencing the TRM, this does not help me, see above. I still do not understand how to best choose values for MFLAGL and MFLAGH, or where the MFLAG is evaluated.

    If you have any other ideas, they'd be greatly appreciated!

    Kind regards,

    Tobias

  • Tobias,

    I don't really have any more details on this. I am checking internally with the other team.

    But i have a question that, are you seeing any issue with this configuration? 

    Rgds,

    Brijesh

  • Hi Brijesh,

    I have not yet tried the settings (MFLAGL=6, MFLAGH=10) from the SDK.

    Regardless of the outcome of the settings: Please let me know, when you hear back from the other team, as we are trying to understand the effects of the MFlag (optimal settings and influences) in detail, thank you!

    Kind regards,

    Tobias

  • Hi Brijesh,

    is there any update from the other team?

    KInd regards,

    Tobias

  • Hi Brijesh,

    any update from the other team?

    KInd regards,

    Tobias

  • Tobias,

    This is clearly explained in the TRM.

    • CAL_CTRL[20:13] MFLAGL <= CAL_CTRL[30:24] MFLAGH (only 0x00 or 0x11 generated, when
    MFLAGL = MFLAGH)
    • CAL_CTRL[20:13] MFLAGL = 0x00, 0xFF or less or equal to 2^(CAL_HL_HWINFO[3:0] WFIFO - 3)
    • CAL_CTRL[30:24] MFLAGH = 0x00, 0xFF or less or equal to 2^(CAL_HL_HWINFO[3:0] WFIFO - 3)

    WFIFO is set to value 9 for CAL module.  Now calculate the parameters and set them accordingly.

    Rgds,

    Brijesh

  • Hello Brijesh,

    This further helps me to clarify my first question, thank you. But we have already discussed that previously in the thread. It does however not help me get an idea on which values are optimal for MFLAGL/MFLAGH: Should I use the rule of thumb as in other modules (50% fill = Warning, 75%: Endagered)? Or should this be handled differently here, as it is in the PDK (a little less than 50%/75%)? This is not stated in the CAL section of the TRM.

    It also does not help me understand, where and how MFlags are - generally speaking - evaluated. Any input on those points would be greatly appreciated.

    Kind regards,

    Tobias

  • Tobias,

    TRM cannot say what should be value of these two threshold levels. It is upto the application to decide based on the other master in the usecase. Typically we have kept 50% to 75% for threshold range. You could even try it out. If this does not work, you could have to lower the high threshold.

    Rgds,

    Brijesh