AM5728: The result of the boundary scan test on AM5728

Nomo-san,

Please re-try with resetn signal asserted (low) during both device power-up and boundary scan test, and let me know the results. Thanks!

Best Regards.

Shiou Mei

Hi Shiou-san,

Thank you for your reply.

We'll check the result for your suggestion.

Best Regards,

Nomo

Hello Shiou-san,

Thank you for your advice.
We re-tried with resetn signal asserted (low) during both device power-up and boundary scan test, and we could pass the Infrastructure test.
However, we faced the error of the Interconnect test with the following pins.
Could you give us the advice against the following condition?

V27pin (DDR1_DQS_ECC)
V28pin (DDR1_DQSN_ECC)

We assumed that this error occurred because of the lack of the definition for the differential signal.
(attribute PORT_GROUPING of AM572_top for these pins are commented out in the BSDL file.)
Because of this, the tool for boundary scan couldn't recognize these pins as the differential signal.

Best Regards,
Nomo

Nomo-san,

Can you confirm if this behavior is repeatable on multiple units/boards?

Moreover, what is the failure signature.  Are you not able to drive '1's or '0's or do you read back unexpected data?

Best Regards,

Shiou Mei

Nomo,

What tool are you using to run this BSDL test?  Is there an option to modify the voltage threshold for a '0' vs a '1'?  Perhaps that could alter the results on these differential pins.

Take Care,

Shiou Mei

Hello Shiou-san,

The tool for this BSDL test is "JTAG ProVision".
www.jtag.com/.../

The tool doesn't recognize V27 and V28 as the differential signal.
Because of this, High or Low seem output from both pins at the same time.

So, our customer is trying to modify the BSDL file.
Could you confirm whether following three modifications are correct?

To set V27 and V28 to the group of the differential signal.
      attribute PORT_GROUPING of AM572_top : entity is
      "Differential_Voltage  ( (mlbp_dat_p,mlbp_dat_n))," &
      "Differential_Voltage  ( (ddr1_dqs_ecc,ddr1_dqsn_ecc))," &
      "Differential_Voltage  ( (mlbp_sig_p,mlbp_sig_n))" ;

To comment out the following line.
--    attribute INSTRUCTION_CAPTURE of AM572_top : entity is "000001";

To modify the description of the V28's boundary scan cell to connect to the internal cell.
--"1335   (bc_1, ddr1_dqsn_ecc, output3, X, 1336, 1, Z)," &
"1335   (bc_1, *, internal, 0)," &

--"1336   (bc_1, *, control, 1)," &
"1336   (bc_1, *, internal, 1)," &

--"1337   (bc_1, ddr1_dqsn_ecc, input, X)," &
"1337   (bc_1, *, internal, 0)," &

We need to confirm whether there is an option to modify the voltage threshold for a '0' vs a '1'.
So, could you explain about more detail of this?

Best Regards,
Nomo

Nomo-san,

Before we modify the BSDL, can you confirm you are setting both ddr1_dqs_ecc and ddr1_dqsn_ecc simultaneously?  During my test run, I observed that ddr1_dqs_ecc and ddr1_dqsn_ecc has to be of opposite polarity for the boundary scan test to work.

So any time you set ddr1_dqs_ecc to 1, ddr1_dqsn_ecc has to be 0, and vice versa.

Thanks & Regards,

Shiou Mei

Hello Shiou-san,

Our customers recognize that they should set ddr1_dqs_ecc to 1, ddr1_dqsn_ecc has to be 0, and vice versa, at any time.
However, the BSDL tool (JTAG ProVision) doesn't work like that because of the failure of auto detection and manual settings.

Because of this, they are trying to modify the BSDL to set ddr1_dqs_ecc to 1, ddr1_dqsn_ecc has to be 0, and vice versa.
Do you have any idea for this?
And, could you confirm whether their modifications are correct?

Best Regards,
Nomo

Nomo-san,

Please help describe the auto-detection and manual setting failures in detail; screen captures will be beneficial.  Thank you!  

In the interim, I am looking into this issue with the internal team.  Will respond back with more details once they are available.

Best Regards,

Shiou Mei

Hello Shiou-san,

About the description of BSDL, our customer asked the vendor of the BSDL tool (JTAG ProVision).
The answer of the vendor was that the modification of BSDL must be needed, so they've tried modified the file.
The file is attached, and could you confirm whether there is any problem in the file?

AM572.pg2_CellPair_mod.bsdl.txt

The background is following.

The part where this fail occurs is not described as a differential in the BSDL file. Because of this, the tool is also not able to recognize automatically.
However, even if you set up a differential pin in the BSDL file, it is not allowed to mount a boundary scan cell on both pins with differential settings, so it is necessary to write one side of the differential pin as not having a boundary scan cell.

Please check if there is any problem with this BSDL.

Best Regards,
Nomo

Hello Shiou-san,

Thank you for your reply.

If we had an additional question, we will post another thread.

Best Regards,

Nomo