Hi,
We are testing the asynchronous SRAM connectected to VC5505 through EMIF CS4 space on our own DSP board. We are using a simple loop to write to SRAM but the CPU often stops running unexpectedly in the middle of the loop although there was no breakpoint set at the place. And after that, the emulator (XDS100v2) usually behaves weirdly and we have to power cycle the board. Some observations related to the problem:
1. The same problem shows up even if we try to write some other EMIF CS space where there were no chips connected.
2. The DSP seems to behave normally if we are writting to the internnal memory.
3. The DSP seems to behave normally if we use VC5505 usbstick instead of our own board, with the same code.
4. We are able to fill / load the SRAM with "Fill memory" and "Save memory" function in the CCS4. (We are using CCS4.2.1).
5. The EMIF WAIT pins on our board are tied to ground and following is the EMIF register setting:
CSL_SYSCTRL_REGS->ESCR = (CSL_SYS_ESCR_BYTEMODE_FULL << CSL_SYS_ESCR_BYTEMODE_SHIFT);
CSL_SYSCTRL_REGS->ECDR = (CSL_SYS_ECDR_EDIV_FULLFRATE << CSL_SYS_ECDR_EDIV_SHIFT);
CSL_SYSCTRL_REGS->PSRCR = 0x20;
CSL_SYSCTRL_REGS->PRCR = (1u << CSL_SYS_PRCR_PG1_RST_SHIFT);
//Reset EMIF
for (i=0; i< 0xfff; i++) asm(" nop");
CSL_EMIF_REGS->EIMCR = 0x003F;
//Disable all EMIF interrupt
CSL_EMIF_REGS->AWCCR1 = 0x0;
//maximum wait cycle = 0;
CSL_EMIF_REGS->AWCCR2 = 0xF0E4;
//Wait PIN active high, Use default wait mapping
CSL_EMIF_REGS->NANDFCR = 0x0;
//Not using NAND for all CS space
//CS4 configuration
CSL_EMIF_REGS->ACS4CR1 = 0xFFFD;
CSL_EMIF_REGS->ACS4CR1 = 0x3CFE;
Can someone help to point out the possible resons of this problem? Or which place we should look into? Thanks a lot!.
A Shen
