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Original question:

PROCESSOR-SDK-DRA8X-TDA4X: Memory Map modifications in dtsi and dtso files, and generating dtbo files

PROCESSOR-SDK-DRA8X-TDA4X: Modifying memory map in PSDKQA

Ameya Wadekar
Prodigy 250 points
Part Number: PROCESSOR-SDK-DRA8X-TDA4X


Hello TI team,

I have an application which requires me to modify the memory map to increase the DDR shared memory allocated to c66 DSP cores.

The application is being developed on PSDKQA 6.2 for TDA4x with QNX.

I would like to know - 

1. Complete procedure to change the memory map for PSDKQA.

2. What steps are required to reflect these changes while booting up the board ?

Please let us know these detailed steps soon.

Thank you,

Ameya.

  • 0
    TI__Guru**** 484425 points

    Hello Ameya,

    So were you able to change memory map for Linux and does it work fine for you?

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 250 points

    Hello Brijesh,

    As I mentioned in the previous E2E thread,

    I am still facing issues in the standard method of changing the "memory map changes for Linux".

    But as I would also need to do these changes for PSDKQA as well, I have posted this query.

    Thank you,

    Ameya.

  • 0 in reply to Ameya Wadekar
    TI__Guru**** 484425 points

    Hi Ameya,

    I think the method is same..

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 250 points
    Hello Brijesh,
    We are referring to the "PSDKQA_7Q70.06.02_UserGuide" for PSDKQA.

    1. The document does not mention any steps for modifying the "memory map". Also as Linux has a procedure of modifying the "dtbs" files and building the "dtbo" files, what procedure are we expected to follow in QNX?
    2. The page 10/28 of the "PSDKQA_7Q70.06.02_UserGuide" mentions the "QNX build file for the J7 BSP", in which the memory sections with pre-defined physical addresses must be set aside. Can you please explain the significance of this build file, and if it should be modified as well.
    3. Also, we have a "sharedmemallocator" in "psdkqa/qnx" folder of the SDK. Can you please elaborate on this utility? Also if any changes need to be made in it for modifying the memory map.
    Please help us by clarifying the above doubts, and provide us with a procedural document for modifying the memory map in PSDKQA.
    Thank you,
    Ameya.
  • 0 in reply to Ameya Wadekar
    TI__Guru**** 484425 points

    Hello Ameya,

    Well, when i said method is same, it is for R5f/C6x/C7x firmwares. There could/would be different method on QNX. Let me loop in QNX expert.

    Rgds,

    Brijesh

  • 0 in reply to Brijesh Jadav
    TI__Guru** 124811 points

    Hi Ameya,

    Please see below, and lets work through any follow up questions

    -- 1 --

    As indicated in the User Guide, the memory carve out of the BSP build file must match the memory definitions from the remote cores.   This means "j721e-evm.build" memory reservation, must match that which is defined in vision_apps/apps/basic_demos/app_tirtos/tirtos_qnx/app_mem_map.h.

    The BSP build file memory reservation ensures that the QNX OS will not directly allocate from that memory region.  The app_mem_map.h ensures that all cores have their required defined memory sections within the reserved region.

    -- 2 --

    The DDR_SHARED_MEM region that has been defined in vision_apps/apps/basic_demos/app_tirtos/tirtos_qnx/app_mem_map.h, must match the definition of SH_MEM_BLOCK1_START/SIZE in psdkqa/qnx/sharedmemallocator/resmgr/SharedMemoryAllocator.c.   The shmemallocator that runs on the A72 is thus aware of / and makes use of the same shared memory region that is in use by the remote cores.

    Regards,

    kb