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Dear experts:
As I stated in previous E2E ticket, ( https://e2e.ti.com/support/processors/f/791/t/899955after we decrease LPDDR4 to 3200MT/s, everything works well.
And we did some parameter tuning in AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool.xlsm to test 3733MT/s, but we got no luck, none of them works, U-Boot still hangs when jumping from SRAM to DDR RAM, and DDRSS driver in U-Boot reports no error.
Please give me some help about how to debug this issue and how to adjust parameters in AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool.xlsm to match our PCB.
Thanks.
Felix,
1) Please provide the DDR configuration xls that you're using, as well as the config file you are using in software.
2) Have you followed the layout guidelines specified here:
Jacinto 7 LPDDR4 Board Design and Layout Guidelines
Regards,
Kyle
Hi Felix,
Can you also please share information regarding the DDR being used in the system?
Thanks,
Kevin