Hi:
The EBSR description in Table 73, page 77 of SPRUGL6A is not clear. The table makes not mention of GPIO[17:12]. These are part of the parallel port. I am wondering if there is a mistake in the document. I think the PPMODE bits actually control GPIO[31:27] and GPIO[20:12] instead of GPIO[31:27] and GPIO[20:18], as stated in the document.
Furthermore, if the PPMODE bits are set to mode 1, then there is a conflict between I2S2_DX and SPI_TX, as seen in Table 1, page 10 of SPRUF04 (GPIO User's Guide).
Could you please clarify?
Thanks a lot.
Cheers,
Mushtaq
