Hello,
I have a product which uses the 66AK2G12 as the main processor. We are using TI RTOS 5.1.
We are using the ARM for general system control and the C66x is handling all of the signal processing. We are using all pins on McASP0 and McASP1 to pass 24 channels of audio in and out of the processor. On the PCB, McASP0 and McASP1 are sent identical external clock signals.
We have noticed a phase offset between the two peripherals. This offset ranges from 1 to 6 samples, changing on system reboot. Between reboots, the phase offset does not change. Thinking it might be due to the peripheral initialization order, I swapped the order in which the DSP starts the peripherals to see if the phase polarity changed, and it did not.
Any information regarding why this may be happening and how to remedy it is appreciated.
Thank you,
Jeff