Hi Team

Thank you for your help

My customer ask the TMS320C6678 SRIO data rate issue , in the data sheet , it describe that it can be configure to 5G baudrate .

But in the KeyStone Architecture Serial Rapid IO (SRIO) user`s guide page 22 , (http://www.ti.com/lit/ug/sprugw1c/sprugw1c.pdf?ts=1588831767265) it show that :

The RapidIO physical layer 1x/4x LP-Serial specification currently covers four frequency points: 1.25, 2.5, 3.125, and 5 Gbps. This defines the total bandwidth of each differential pair of I/O signals. An 8-bit/10-bit encoding scheme ensures ample data transitions for the clock-recovery circuits. Due to the 8-bit/10-bit encoding overhead, the effective data bandwidth per differential pair is 1.0, 2.0, 2.5, and 4 Gbps, respectively. Serial RapidIO only specifies these rates for both the 1x and 4x ports. A 1x port is defined as one TX and one RX differential pair. A 4x port is a combination of four of these pairs. This document describes a 4x RapidIO port that can also be configured as four 1x ports; this provides a scalable interface capable of supporting a data bandwidth of 1 to 16 Gbps.

Is that means physical layer support to 5G , but effective data rate is 4G ?

So I want to confirm the  TMS320C6678 SRIO 5Gbps data rate whether  is achievable .

Thank you again.

BR,

Leon.liu