Hello team,
I got Inquiry about DDR3 implementation of AM335x. According to "Figure 7-49" in datasheet(https://www.ti.com/lit/gpn/am3352), DDR_CKE pin was terminated with DDR_VTT. However, According to the schematic of TI EVM(https://www.ti.com/lit/zip/sprr164), DDR_CKE pin was Not terminated.
This implementation depends on what kinds of DDR3 customer uses. I mean, this implantation may depend on ODTs(On-device terminations). Is that correct? Due to avoid miss, I'd like to just clarify it. It will be appreciated if you will be able to share Expert's comments on this.
Best regards
Miyazaki
