Mcbsp_BufferFormat explanation

Hi Mike,

       Could I know which version of BIOS PSP you are using?

Thanks and Regards,

Sandeep

OMAP-L138 PSP drivers 01.30.01

Mike,

There are three types of buffer formats available and they are,

1.    Single slot (Mcbsp_BufferFormat_1SLOT)

2.    Multi-slot non interleaved (Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED)

3.    Multi-slot interleaved  (Mcbsp_BufferFormat_MULTISLOT_INTERLEAVED)

1.    Mcbsp_BufferFormat_1SLOT:

The data format would be like,

[<Slot1-Element1>, <Slot1- Element 2>…<Slot1- ElementN>]

2.    Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED:

The data format would be like,

[<Slot1-Sample1>, <Slot1-Sample2>..…<Slot1-SampleN>,

 <Slot2-Sample1>, < Slot2-Sample2>….< Slot2-SampleN>]

The data is expected to be contiguous for a given slot.

3.    Mcbsp_BufferFormat_MULTISLOT_INTERLEAVED:

The samples are expected to be interleaved for the slots and the data format would be like,

[<Slot1-Sample1>, <Slot2-Sample1>…<Slot1-SampleN><Slot2-SampleN>]

Thanks and Regards,

Sandeep K

OK, that was my expectation, but not what I'm seeing.  I am talking to a codec and have it set to Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED.  I am seeing the data is still stored interleaved.  What am I missing?  Note that I modified Mcbsp_ClkSetup to allow for a custom bit clock, in order to get the right division for my sample rate.

/**< settings to configure the TX or RX hardware sections                 */
Mcbsp_DataConfig mcbspChanConfig =
{
    Mcbsp_Phase_SINGLE,
    Mcbsp_WordLength_16,
    Mcbsp_WordLength_16,     /* Dont care                */
    AUDIO_NUMCHANNELS,
    AUDIO_NUMCHANNELS,        /* Dont care                */
    Mcbsp_FrmSync_DETECT,
    Mcbsp_DataDelay_0_BIT,
    Mcbsp_Compand_OFF_MSB_FIRST,
    Mcbsp_BitReversal_DISABLE,
    Mcbsp_IntMode_ON_SYNCERR,
    Mcbsp_RxJust_RZF,    /* Dont care for TX         */
    Mcbsp_DxEna_OFF
};


/**< clock setup for the RX or the TX section                             */
Mcbsp_ClkSetup mcbspClkConfig =
{
    Mcbsp_FsClkMode_INTERNAL,
    64000,
    Mcbsp_TxRxClkMode_INTERNAL,
    Mcbsp_FsPol_ACTIVE_HIGH,
    Mcbsp_ClkPol_RISING_EDGE,
    50 /* force 50 bit frame for even division */
};

/**< Multi channel setup                                                  */
Mcbsp_McrSetup mcbspMultiChanCtrl =
{
    Mcbsp_McmMode_ALL_CHAN_ENABLED_UNMASKED,
    Mcbsp_PartitionMode_CHAN_0_15,
    Mcbsp_PartitionMode_CHAN_16_31,
    Mcbsp_PartitionMode_2
};

Mcbsp_ChanParams mcbspChanparam =
{
    Mcbsp_WordLength_16,   /* wordlength configured    */
    NULL,                 /* loop job buffer internal */
    0,                    /* user loopjob length      */
    NULL,                 /* global error callback    */
    NULL,                 /* edma Handle              */
    1,                    /* EDMA event queue         */
    8,                    /* hwi number               */
    Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED,
    TRUE,                 /* FIFO mode enabled        */
    &mcbspChanConfig,     /* channel configuration    */
    &mcbspClkConfig,      /* clock configuration      */
    &mcbspMultiChanCtrl,  /* multi channel control    */
    0x00,
    0x00,
    0x00,
    0x00
};

Mike,

The data will be organized as required by modifiying the EDMA configurations in the McBSP driver. As you can see in the function Mcbsp_localGetIndicesSyncType() of file McBSP_edma.c, here the EDMA configuration differs for interleaved data and the non interleaved data.

So, only possible configuration conflict would be the edma configuration parameters like aCnt, bCnt and cCnt. These parameter depends on roundedWordWidth, data buffer size and frame length1/frame length 2. Please verify these parameters.

can you share these parameter, so that i can analyse it?

Thanks and Regards,

Sandeep K

Sandeep,

It looks like the dataFormat flag in Mcbsp_ChanParams is not being honored.  The data format is being hardcoded to Mcbsp_BufferFormat_1SLOT in mcbspMdBindDev and never changed.

Mike