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TDA2P-ACD: Boundary Scan issue

Jan Balzer
Prodigy 90 points

Part Number: TDA2P-ACD

I have some issues with the boundary scan test of the TDA2PHVRQACDQ1.

I can not control the described boundary scan pins. But the most importent pins are:

QSPI CLK pin R1 and R2

DDR2_WEN
DDR1_WEN
DDR2_CSN0
DDR1_CSN0

All these pins I can not drive by an level via boundary scan. If I run an boundary scan access to the QSPI I need control the CLK signal. Also for an boundary scan interconnection to the DDR RAM. I need to control the CS and WE singals.

For the QSPI I can control the CS, DQ0-DQ3 via boundary scan. But not for CLK.
The boundary scan cell description for CLK and CA and DQ0-DQ3 are the same structure. I think it is ok, but I can not verify an problem of the BSDL model


I think a configuration is nesseccary to control these pins as decribe in the BSDL model. Or a wrong BSDL model are the probelm?

You see the driven level and the read and expected level of these pins. But the not working pins are alsways measure a static low or high level. Other pins works fine. But the difference of the working and not working pin I can not see? 

Test steps DDR1_WEN:
-25- Soll H H L L H H L H L L L L H L L H L H H H H L
-28- Ist <Stuck at low>
-30- Outputpin U32:ddr1_wen(#AG22) H H L L H H L H L L L L H L L H L H H H H L
-31- Inputpin U32:ddr1_wen(#AG22) >L>L L L>L>L L>L L L L L>L L L>L L>L>L>L>L L

Test steps DDR2_CSN0:
-25- Soll H H H H H H H H H H H H H H H H H H H H H H
-28- Ist <Stuck at low>
-30- Outputpin U32:ddr2_csn0(#M26) H H H H H H H H H H H H H H H H H H H H H H
-31- Inputpin U32:ddr2_csn0(#M26) >L>L>L>L>L>L>L>L>L>L>L>L>L>L>L>L>L>L>L>L>L>L

Test steps DDR2_WEN:
-25- Soll H H L L H H L L H L H L H L L H H L H L H L
-28- Ist <Stuck at low>
-30- Outputpin U32:ddr2_wen(#T24) H H L L H H L L H L H L H L L H H L H L H L
-31- Inputpin U32:ddr2_wen(#T24) >L>L L L>L>L L L>L L>L L>L L L>L>L L>L L>L L

Test steps QSPI1_RTCLK:
-25- Soll H H L L H L L H L H L H H L H H L H L H L L
-28- Ist <Stuck at low>
-30- Outputpin U32:gpmc_a13(#R2) H - L - H L L H L H L H H L H H L H L H L L
-30- Outputpin U32:gpmc_a18(#R1) - H - L - - - - - - - - - - - - - - - - - -
-31- Inputpin U32:gpmc_a13(#R2) >L>L L L>L L L>L L>L L>L>L L>L>L L>L L>L L L
-31- Inputpin U32:gpmc_a18(#R1) >L>L L L>L L L>L L>L L>L>L L>L>L L>L L>L L L

Best regards

Jan

  • 0
    TI__Genius 10180 points

    Jan,

    Please re-try with resetn signal asserted (low) during both device power-up and boundary scan test.  Moreover, can you confirm what your EMU0/1 setting is? Thanks!

    Best Regards,

    Shiou Mei

  • 0 in reply to Shiou Mei Huang
    Prodigy 90 points

    What do you mean exactly for an reset signal.

    The power supply of the TDA2P is activate and controle by an PMIC. The PORZ (#C25) pin is hold low before the PMIC activate the power supply. After power up the PORZ pin is driven high.

    After that the TRSTn (D20) pin ist toggle from high to low to high. Now the boundary scan works. The ID code can be read correctly and the other pins works. But only the described pins fails.

    If I activate the PORZ (#C25 ) directly to high before I activate the power supply via PMIC, I see more failed pins. So I think it is not the problem. 

    Or can you describe the correct reset sequence, please?

    The both EMU0 and EMU1 pins are allways pulled to a high level.

    Thank you for your help. Please give me an feedback please.

  • 0 in reply to Jan Balzer
    TI__Genius 10180 points

    Jan,

    RESETN is pin E23 on the device.  Please keep it asserted (low) through power up and boundary scan test.

    Also try with EMU0 = 0 and EMU1 = 1.

    Best Regards,

    Shiou Mei

  • 0 in reply to Shiou Mei Huang
    Prodigy 90 points

    Hello,

    I've made several attempts, none of which have helped.

    On my package (ACD) the resetn is pin D24. I hold low at the beginning. After power up with the PMIC I set to high. No difference. Same behaviour as before.

    Also if I hold EMU 0 to low. No difference. 

    All these pins fail. I can measure with boundary scan but I can not driven these pins.

    U32:ddr1_csn0(#AD23)      
    U32:ddr1_wen(#AG22)     
    U32:ddr2_csn0(#M26)      
    U32:ddr2_wen(#T24)      
    U32:emu0(#F19)      
    U32:gpmc_a7(#N6)      
    U32:gpmc_a12(#P4)     
    U32:gpmc_a13(#R2)      
    U32:gpmc_a14(#R6)
    U32:gpmc_a15(#T2)
    U32:gpmc_a18(#R1)      
    U32:gpmc_a23(#G5)      
    U32:gpmc_wen(#M3)      
    U32:mmc1_clk(#W3)
    U32:mmc1_cmd(#W5)
    U32:mmc1_dat0(#V5)
    U32:mmc1_dat1(#Y4)
    U32:mmc1_dat2(#Y5)
    U32:mmc1_dat3(#Y3)
    U32:mmc3_clk(#AC3)      

    Do you have any idea what can I check to solve this issue? Please help!

    Jan
  • 0 in reply to Jan Balzer
    TI__Genius 10180 points

    Jan,

    You could be de-asserting RESETn too early.  Please keep RESETn asserted (LOW) through the BSDL test duration, and use EMU0=0 and EMU1=1.  .

    Best Regards,

    Shiou Mei

  • 0 in reply to Shiou Mei Huang
    Prodigy 90 points

    Hello,

    I try some different sequences. I set the EMU0 pin to ground. After that the power of the second CPU (Renesas) are activate. This Renesas CPU controlled the power of the TDA2p. So I controlled a PMIC. I hold low reset pin of the TDA2p. Also the PORZ pin I hold low. After config the PMIC. I see all supplys of the TDA2p. I set the Reset and the PORZ pin to high. I see always the failed pins I was describe in the posts before. 

    I think another configuration are needed or another sequnece I needed. Do you have some more details for me please. 

    Also I think the reset pin is in the boundary scan mode a bidirectional pin. No other function is activate for this pin.

    I hope you have some other ideas that I can try to solve this issue. 

    Thank you for your support!

    Jan

  • 0 in reply to Jan Balzer
    TI__Genius 10180 points

    This thread has been taken offline as more information about customer setup is needed.  One key factor to check is the following:

    1. Hold RESETn active during BSCAN
    1. PORz should be de-asserted (high) before BSCAN as customer mentioned, but RESETn should be asserted (LOW).  Was RESETn and PORz tied together, thus why RESETn was released before BSCAN execution?

    Best Regards,

    Shiou Mei