run arm code on shared ram

Yes, the ARM can cache the shared memory.

-Tommy

Hi, Tommy

Thanks for your reply.

If the ARM can cache the shared ram, how can i do it?

 I noticed the cache can be enabled only by enable the mmu first, so shoud i setup the mmu table to use the shared ram too?

thank you,

zhihan

Zhihan,

I think that it may be possible to enable cache without MMU.  The ARM926EJ-S technical reference manual seems to suggest so.

-Tommy

Tommy,

On page 4-6 of ARM926EJ-S technical reference manual (table 4-3), written that when the DCache enabled and MMU disabled, the DCache is effectively disabled. So if I understand this correctly, there is no way to enable DCache without MMU.

Am I right?

Alexey,

I'm not quite an ARM expert either so I'm reading through the manual with you guys =)  I see in Table 4-1 that ICache can be enabled without MMU so at least you can have instructions at the ready.  It does look like DCache + MMU is the use-case envisioned by ARM, but I also see a Debug Override Register in Table B-1that looks like you can enable DCache with MMU disabled.  It's probably a hack, but it's there.

-Tommy

Tommy,

The problem has been solved by using page MMU, although the section MMU does not work. There maybe some trick i don't understand now but it works. I will read the ARM techdoc for more infor.

thanks

zhihan