Hi all,
looking at the SDMMC application note I read that dm365 (TMS320DM365ZCE27, i.e. silicon rev 1.2) can communicate using 1 bit of data and 20Mhz of CLK and that it is compatible to MMC V3.31.
I have a custom board with inside an eMMC v4.3 and it works well with linux kernel arago r37 using 4 bit data and 50Mhz CLK.
Maybe the dm365-SDMMC application note is to be updated?
Could I have some bugs going on with 4 bit data and 50Mhz CLK?
Any info is appreciated.