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PROCESSOR-SDK-AM335X: WDT reset

Part Number: PROCESSOR-SDK-AM335X

Hi I am trying to use BeagleBone Black watchdog to trigger a reset, i used the command from other post - cat > /dev/watchdog, i think the BBB reset, but I didn't see the pulse at pin nRESETIN_OUT which I wanted. i am currently using SDK 05.03.00.07. 

  • Yue,

    Yue Zhang65 said:
    i think the BBB reset, but I didn't see the pulse at pin nRESETIN_OUT which I wanted.

    How are you determining this? Can you try using a digital oscilloscope, set for a reasonably small timebase, with the trigger set to the falling signal edge?

    Also the length of the reset pulse on nRESETIN_OUT is controlled through the PRM_RSTTIME register so that is something you should experiment with. Please review this related post here: e2e.ti.com/.../1044940

    Regards, Andreas

  • Thanks Andreas!

    I do have a scope connected to the nRESETIN_OUT, it was high all the time.. the BBB leds off and my Ethernet connect was terminated - I think it indicated a BBB reset  - but you mentioned the pulse width -  I will take a look, where to adjust the pulse width in BBB configuration? hardware should be fine - I have my own API can pull this pin low...

    thanks you so much!

  • Hi Yue,

    Yue Zhang65 said:
    but you mentioned the pulse width -  I will take a look, where to adjust the pulse width in BBB configuration?

    you could experiment with changing the pulse width using three different methods:

    1. From the Linux command line using the 'devmem2' tool by reading the PRM_RSTTIME register, manipulating the bitmask, and writing it back. That might be the quickest way for testing purposes.
    2. Use a JTAG debugger to manipulate the PRM_RSTTIME contents during runtime
    3. To make changes permanent you could probably modify the arch/arm/mach-omap2/prm33xx.c:am33xx_prm_init() function to include an access to update that control register

    Regards, Andreas