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AM3352: D-cache configuration

user6109596
Intellectual 670 points

Part Number: AM3352
Other Parts Discussed in Thread: SYSBIOS

Hi,

Now I use AM3352(Cortex-A8) in my project.The AM3352's MMU is not enabled in my project (just set Mmu.enableMMU = false in my project's main.cfg file).

And I need to use D-cache,so I have a question:is D-cache can be enabled,and work normally when MMU is disabled? If the D-cache can work normally with MMU disabled,how should I do to configuire the D-cache?

The bios_6_75_02_00 is used in my project.

  • 0
    TI__Mastermind 30108 points

    Hi,

    Please see the documentation below which is contained in the SYS/BIOS installation.

    <BIOS>/docs/cdoc/ti/sysbios/family/arm/a8/Cache.html

    Data caching requires the MMU to be enabled and the cacheable attribute of the section/page descriptor for a corresponding memory region to be enabled.

    <BIOS>/docs/cdoc/ti/sysbios/family/arm/a8/Mmu.html, excerpt from example for placing the MMU table and how to enable L1 data + L2 caching:

    // Enable the cache
Cache.enableCache = true;

// Enable the MMU (Required for L1/L2 data caching)
    Mmu.enableMMU = true;

    Regards,
    Frank

  • 0 in reply to Frank Livingston
    Intellectual 670 points

    Thank you for your answer!