• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 472 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VM: TDA4VM

hutian
Expert 1785 points
Part Number: TDA4VM

Hi experts,

I want to test the SPI function on our custom board of TDA4VM. Our custom board has enabled SPI0 (slave mode) and SPI1(master mode). I see there exists a test example in RTOS SDK ( sdk_rtos_auto_j7_06_02_00_21/pdk/packages/ti/drv/spi/example/mcspi_slavemode ). But i don't know how to integrate the test expample into a RTOS system and run in a R5F core.

Could you please provide some guidence to me?

Thanks,

Hutian

  • 0
    TI__Guru* 77774 points

    Hi Hutian,

    The example needs to be run with CCS. You need to build 2 applications one for master (to run on R5F) and slave (to run on A72) then load them on to respective cores from CCS and run.

    So if you look at the documentation of the application, \details in the comments in main_mcspi_slave_mode.c

    23  *          For AM65xx and J721e devices, to demonstrate the example two cores  
24  *          on the same SoC are needed, mcu1_0 uses McSPI instance 2 on the MCU 
25  *          domain as the master and mpu1_0 uses  McSPI instance 4 on the Main  
26  *          doman as slave. These two instances are internally connected in the SoC:
27  *                                                                              
28  *          Following is the internal pin signal connection information:        
29  *          MasterSPI_SCLK----SlaveSPI_SCLK                                     
30  *          MasterSPI_D1------SlaveSPI_D0                                       
31  *          MasterSPI_D0------SlaveSPI_D1                                       
32  *          MasterSPI_CS------SlaveSPI_CS                                       
33  *                                                                              
34  *          To run the example:                                                 
35  *          1) Run the MasterSlave mpu1_0 test binary (slave) on MPU1_0 core    
36  *          2) Run the MasterSlave mcu1_0 test binary (master) on MCU1_0 core   
37  *          3) Be sure to run slave application and then master application

    Building the apps:

    # Master app on MCU1_0
make MCSPI_MasterSlave_TestApp CORE=mcu1_0 -sj

# Slave app on MPU1_0
make MCSPI_MasterSlave_TestApp CORE=mpu1_0 -sj

    Running the apps: (as mentioned in documentation in comments)

    35  *          1) Run the MasterSlave mpu1_0 test binary (slave) on MPU1_0 core    
36  *          2) Run the MasterSlave mcu1_0 test binary (master) on MCU1_0 core   
37  *          3) Be sure to run slave application and then master application

    Observing the output:

    Open the MAIN UART 1st instance (for slave app prints) and MCU UART 2nd instance (for master app prints)

    There was also a related thread at - https://e2e.ti.com/support/processors/f/791/p/902713/3344543 if you want to look at it.

    Regards,

    Karan