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Student: C5515 EVM- Address Space, IO and general practices

w longenecker
Prodigy 50 points
Other Parts Discussed in Thread: TMS320C5515

Background: I am working on a senior design and recently purchased the EVM c5515 module. I'm relatively versed in C++ and basic assembly and ultimately plan on using the board in a noise cancellation application.

Problem: Unfortunately, I"m having difficulty comprehending the modules memory map. I'm trying to follow some of the demo programs and don't quite understand where they are getting the addresses for the different functions. For example, in this particular demo code's .h file

/*  Timer register declaration*/

 

#define CPU_TIM0_CTRL ((ioport volatile unsigned*)0x1810)

#define CPU_TIM0_PLWR ((ioport volatile unsigned*)0x1812)

#define CPU_TIM0_PHWR ((ioport volatile unsigned*)0x1813)

#define CPU_TIM0_CLWR ((ioport volatile unsigned*)0x1814)

#define CPU_TIM0_CHWR ((ioport volatile unsigned*)0x1815)

#define CPU_TIM0_IER ((ioport volatile unsigned*)0x1816)

#define CPU_TIMINT_AGGR ((ioport volatile unsigned*)0x1c14)

#define CPU_PRCR ((ioport volatile unsigned*)0x1c05) 

 

1. Are the identifiers programmer assigned, specific to the chip?

2. Are the address's (0x1816 etc etc) arbitrary? Listed somewhere? I have a technical reference and don't seem to see the correlation.

 

I guess it boils down to flat out not understanding on how to interface with the various hardware aspects on the board. I'm struggling to find a tutorial on how to interact with the different features on EVM board. Overall, I'm struggling to get off the ground with the project. With that in mind, any advice or basic information that you can provide would be more than appreciated.

 

Thank you in advance!

William and Doug

Lehigh University

 

  • 0
    TI__Mastermind 23785 points

    Those are the CPU word address mapping. You can refer to Table 6--50 on SPRB645B for details. The are chip specific.

    I would recommend to the first item in this forum posted by my collegiate, Mugdha, as a start.

    http://e2e.ti.com/support/dsp/tms320c5000_power-efficient_dsps/f/109/p/316055/Reply.aspx

    Regards.

  • 0 in reply to Steve Tsang
    Prodigy 50 points

    I am trying to find that document "SPRB645B". Unfortunately I don't see it in TI's user manual search. Is there any way you can provide the link please? 

  • 0 in reply to w longenecker
    TI__Mastermind 23785 points

    Use this link to the C5515 home page:

    http://focus.ti.com/docs/prod/folders/print/tms320c5515.html

    It is the first item under Datasheet.

    Regards.

  • 0
    Intellectual 480 points

    Generally speaking, whenever you see specific numbers other than 0 or 1 it is a fixed memory address or register index specific to the hardware (ie microprocessor). The only way to know what these magic numbers mean is to refer to the spellbook, otherwise known as the datasheet. This is why you see lines like "#define CPU_TIM0_CTRL ((ioport volatile unsigned*)0x1810)". Because CPU_TIM0_CTRL is easier to read than 0x1810.

    Humans like "CPU_TIM0_CTRL", but the microprocessor only understands 0x1810.

    1. Yes, they are specific not only to the chip, but the revision of the chip.

    2. Yes, they are completely arbitrary. Reading the datasheet for the chip is the only way to understand the numbers. For example, the datasheet for the Pentium processor comes in six volumes, each 700 pages. The datasheet for the MSP430 is a single volume of 694 pages.

    -- Chip