AM3352: SDRAM refresh rate calculation

Part Number: AM3352

Hi,  

    there is   a little confusion when we calculate reg_refresh_rate in AM335x TRM chapter 7.3.5.5 SDRAM_REF_CTRL Register (offset = 10h) [reset = 80001388h](at page 935 in SPRUH73P–October 2011–Revised March 2017), would you please give an example about how to calculate  reg_refresh_rate ? on our design , we use 2Gb DDR2 SDRAM which requires 8192 cycle in 64ms. 

Thanks

Hugo