DSPLib Benchmarking

RdN

Other Parts Discussed in Thread: TMS320C6452

Hi,

In the benchmarking tables in the DSPLib documentation (sprueb8b.pdf, TMS320C64x+ DSP little endian DSP Library Programmer's Reference), what does the following abbreviations mean?

Nat C
INT C
SA

Thank you.

over 15 years ago

0 RdN over 15 years ago

Intellectual 345 points

In addition to the above question, I also have the following questions regarding to the bechmark tables in the DSPLib documentation of which an example is shown below for the following function, DSP_fft32x32:

MIPS (CPU Cycles)

N Nat C INT C SA

...

2048 143479 24996 19926

...

Firstly, according to me MIPS and CPU Cycles are not the same? The TMS320C6452 can do 7200 MIPS at a 900MHz clock cycle.

Secondly, am I correct in saying from the above table that the TMS320C6452 can perform a FFT of size 2048 in 27.7us (1/900e6*24996) ?

Thank you.

0 Dudley White over 14 years ago

Prodigy 10 points

I have the same question. My best guess is "natural C", "C with intrinsic functions", and "linear assembly".

0 DanRinkes over 14 years ago in reply to Dudley White

TI__Expert 8055 points

Dudley is correct.

NAT C = Natural C

INT C = C with the help of intrinsics where applicable

SA = Linear Assembly (formerly called Serial Assembly)

Regards,
Dan

0 Travis Fagerness over 14 years ago in reply to DanRinkes

Prodigy 70 points

Isn't DSLIB written in assembly? How can you tell which benchmark to use?

Processors

Processors forum

DSPLib Benchmarking