Hi, I just realized I posted to the DM37x board by accident. Note this is a duplicate post of the link below. Just want to make sure this messaged is directed to the correct people.
thanks,
Greg
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/537/t/91027.aspx
Hi,
Reviewing the DM365 EVM rev C, it looks like they have included a capacitive EMI filter between the CPU_VCC_1V8 and the DDR_VDD. This effectively results in DDR_VDD and CPU_VDD_DDR not sharing the same power plane.
Your layout guidelines recommend having a solid 1.8V power plane under the DDR2 keepout region. I imagine this means that DDR_VDD and CPU_VDD_DDR should share the same power plane, but I would like to confirm with you.
Please advise.
thanks,
Greg
