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DRA712: DRA712 CPU frequency settings

Part Number: DRA712

Hello.

We use a DRA712 processor.
We need to change the CPU frequency in the linux device tree and make it run at 600 MHz.
In accordance with the Power Management section of the processor SDK Linux:
1. We checked that all relevant config options are correctly set.
2. The device tree is configured this way:

cpus {
#address-cells = <1>;
#size-cells = <0>;

cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;

operating-points-v2 = <&cpu0_opp_table>;

clocks = <&dpll_mpu_ck>;
clock-names = "cpu";

clock-frequency = <600000000>;
clock-latency = <300000>; /* From omap-cpufreq driver */

/* cooling options */
#cooling-cells = <2>; /* min followed by max */

vbb-supply = <&abb_mpu>;
};
};

cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_wkup>;

opp_nom-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <1060000 850000 1150000>,
<1060000 850000 1150000>;
opp-supported-hw = <0xFF 0x01>;
opp-suspend;
};

opp_od-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1160000 885000 1160000>,
<1160000 885000 1160000>;

opp-supported-hw = <0xFF 0x02>;
};

opp_high@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1210000 950000 1250000>,
<1210000 950000 1250000>;
opp-supported-hw = <0xFF 0x04>;
};
};

Questions:
1. Are these changes enough for the correct frequency value for CPU (600M)?
2. Why BogoMIPS value doesn't change while core frequency was changed (value calculated using timer frequency.. 11.80 BogoMIPS)?
3. How do I make sure that the core is running at the frequency I set.
4. Why are there no virtual files described in the guide:
/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_governors
/sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
/sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed

  • You can use "omapconf show opp" command to check the frequency of CPU.
    (or)
    You can also check /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq

    Regards,
    Vishal

  • Hello Vishal,

    1.

    I tried making those changes in uboot and kernel. But I can't understand, does it work or not?

    Uboot changes  :

    --- a/arch/arm/mach-omap2/omap5/hw_data.c
    +++ b/arch/arm/mach-omap2/omap5/hw_data.c
    @@ -41,7 +41,7 @@ static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {
    /* OPP NOM FREQUENCY for OMAP5 ES2.0, and DRA7 ES1.0 */
    static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
    {250, 2, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
    - {500, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
    + {300, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
    {119, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
    {625, 11, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
    {500, 12, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */

    2. omapconf show opp:

    /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor not found, no CPUFREQ?
    omapconf: warning: no matching rate for VDD_CORE OPP.Please check rates against Data Manual recommendations.
    cpu_is_online(1): error opening /sys/devices/system/cpu/cpu1/online file!
    |-----------------------------------------------------------------------------------|
    |                        | Temperature | Voltage | Frequency      | OPerating Point |
    |-----------------------------------------------------------------------------------|
    | VDD_CORE / VDD_CORE0   | 81C / 177F  | NA      |                | UNKNOWN         |
    |   L3                   |             |         |  265  MHz      |                 |
    |   DMM                  |             |         |  265  MHz      |                 |
    |   EMIF1                |             |         |  265  MHz      |                 |
    |   EMIF2                |             |         |  265  MHz      |                 |
    |     LP-DDR2            |             |         |  666  MHz      |                 |
    |   L4                   |             |         |  265  MHz      |                 |
    |   IPU1                 |             |         | (2127 MHz) (1) |                 |
    |     Cortex-M4 Cores    |             |         | (1063 MHz) (1) |                 |
    |   IPU2                 |             |         | (2127 MHz) (1) |                 |
    |     Cortex-M4 Cores    |             |         | (1063 MHz) (1) |                 |
    |   DSS                  |             |         |  192  MHz      |                 |
    |   BB2D                 |             |         | (2127 MHz) (1) |                 |
    |                        |             |         |                |                 |
    | VDD_MPU / VDD_CORE1    | 80C / 176F  | NA      |                | NOM             |
    |   MPU (CPU1 OFF)       |             |         |  1000 MHz      |                 |
    |                        |             |         |                |                 |
    | VDD_GPU / VDD_CORE2    | 81C / 177F  | NA      |                | NOM             |
    |   GPU                  |             |         |  425  MHz      |                 |
    |                        |             |         |                |                 |
    | VDD_DSPEVE / VDD_CORE3 | 78C / 172F  | NA      |                | NOM             |
    |   DSP1                 |             |         | (600  MHz) (1) |                 |
    |   DSP2                 |             |         | (600  MHz) (1) |                 |
    |   EVE1                 |             |         | (0    MHz) (1) |                 |
    |   EVE2                 |             |         | (0    MHz) (1) |                 |
    |                        |             |         |                |                 |
    | VDD_IVA / VDD_CORE4    | 80C / 176F  | NA      |                | NOM             |
    |   IVA                  |             |         |  388  MHz      |                 |
    |                        |             |         |                |                 |
    |-----------------------------------------------------------------------------------|

    3.

    Also, I cant find these virtual files. Have you any Ideas why I cant see it?

    /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_governors
    /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
    /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
    /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed



     

  • It didn't work. The MPU frequency is still 1000 MHz.
    Could you try only changing the existing OPP from 1000 MHz to 600MHz. Don't add new OPPs yet. First get the 600MHz change working.

    |-----------------------------------------------------------------------------------|
    |                        | Temperature | Voltage | Frequency      | OPerating Point |
    |-----------------------------------------------------------------------------------|
    | VDD_CORE / VDD_CORE0   | 81C / 177F  | NA      |                | UNKNOWN         |
    |   L3                   |             |         |  265  MHz      |                 |
    |   DMM                  |             |         |  265  MHz      |                 |
    |   EMIF1                |             |         |  265  MHz      |                 |
    |   EMIF2                |             |         |  265  MHz      |                 |
    |     LP-DDR2            |             |         |  666  MHz      |                 |
    |   L4                   |             |         |  265  MHz      |                 |
    |   IPU1                 |             |         | (2127 MHz) (1) |                 |
    |     Cortex-M4 Cores    |             |         | (1063 MHz) (1) |                 |
    |   IPU2                 |             |         | (2127 MHz) (1) |                 |
    |     Cortex-M4 Cores    |             |         | (1063 MHz) (1) |                 |
    |   DSS                  |             |         |  192  MHz      |                 |
    |   BB2D                 |             |         | (2127 MHz) (1) |                 |
    |                        |             |         |                |                 |
    | VDD_MPU / VDD_CORE1    | 80C / 176F  | NA      |                | NOM             |
     MPU (CPU1 OFF)       |             |         |  1000 MHz      |                 |
    |                        |             |         |                |                 |
    | VDD_GPU / VDD_CORE2    | 81C / 177F  | NA      |                | NOM             |
    |   GPU                  |             |         |  425  MHz      |                 |
    |                        |             |         |                |                 |
    | VDD_DSPEVE / VDD_CORE3 | 78C / 172F  | NA      |                | NOM             |
    |   DSP1                 |             |         | (600  MHz) (1) |                 |
    |   DSP2                 |             |         | (600  MHz) (1) |                 |
    |   EVE1                 |             |         | (0    MHz) (1) |                 |
    |   EVE2                 |             |         | (0    MHz) (1) |                 |
    |                        |             |         |                |                 |
    | VDD_IVA / VDD_CORE4    | 80C / 176F  | NA      |                | NOM             |
    |   IVA                  |             |         |  388  MHz      |                 |
    |                        |             |         |                |                 |
    |-----------------------------------------------------------------------------------|


    For the cpufreq sysfs entries, check if CONFIG_CPU_FREQ config is enabled in Kernel defconfig.

  • Hello, Vishal

    1.
    In uboot I did this changes:
    /arch/arm/mach-omap2/omap5/hw_data.c

    static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
    {250, 2, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
    - {500, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
    + {300, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */
    {119, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
    {625, 11, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
    {500, 12, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */

    In kernel dts: dra7.dtsi

    - opp_nom-1000000000 {
    - opp-hz = /bits/ 64 <1000000000>;
    + opp_nom-600000000 {
    + opp-hz = /bits/ 64 <600000000>;
    opp-microvolt = <1060000 850000 1150000>,
    <1060000 850000 1150000>;
    opp-supported-hw = <0xFF 0x01>;
    opp-suspend;
    };

    But the frequency is not changed.

    2.
    There is no "ti-dra.._defconfig" in the 6-th linux sdk. Instead there are a set of config fragments in "ti_config_fragments" directory, from which the _defconfig is created during build.

    In the "baseport.cfg" fragment there are such options:

    # CPU Frequency scaling
    CONFIG_CPU_FREQ=y
    CONFIG_CPU_FREQ_GOV_COMMON=y
    CONFIG_CPU_FREQ_STAT=y
    CONFIG_CPU_FREQ_STAT_DETAILS=y
    CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
    CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
    CONFIG_CPU_FREQ_GOV_POWERSAVE=y
    CONFIG_CPU_FREQ_GOV_USERSPACE=y
    CONFIG_CPU_FREQ_GOV_ONDEMAND=y
    CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y

    # CPUFreq Driver Options
    CONFIG_CPUFREQ_DT=y
    CONFIG_ARM_BIG_LITTLE_CPUFREQ=n
    CONFIG_ARM_KIRKWOOD_CPUFREQ=n
    CONFIG_ARM_OMAP2PLUS_CPUFREQ=n
    CONFIG_ARM_TI_CPUFREQ=y
    CONFIG_QORIQ_CPUFREQ=n

    But there is no cpufreq sysfs entries.

  • Hi,

    The reference change I showed is from TI EVM which has 20 MHz refclk.
    For the custom board you have the refclk is 19.2 MHz, So the change needs to be done in different row.

    Can you try the below change in u-boot instead?
    I am checking with hardware team to confirm the values for 600MHz.

    diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
    index 246b4ba84e..c2a6736025 100644
    --- a/arch/arm/mach-omap2/omap5/hw_data.c
    +++ b/arch/arm/mach-omap2/omap5/hw_data.c
    @@ -43,7 +43,7 @@ static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
            {250, 2, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},         /* 12 MHz   */
            {500, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},         /* 20 MHz   */
            {119, 1, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},         /* 16.8 MHz */
    -       {625, 11, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},        /* 19.2 MHz */
    +       {312, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
            {500, 12, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},        /* 26 MHz   */
            {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},       /* 27 MHz   */
            {625, 23, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},        /* 38.4 MHz */


    Regards,
    Vishal

  • Hi,

    Last advice for uboot works. The mpu frequency was changed, but to 499MHz.
    Is it normal, that BogoMIPS value does not change while MPU freq is now lower two times?

    omapconf show opp:

    omapconf: warning: no matching rate for VDD_CORE OPP.Please check rates against Data Manual recommendations.
    omapconf: warning: no matching rate for VDD_MPU OPP.Please check rates against Data Manual recommendations.
    cpu_is_online(1): error opening /sys/devices/system/cpu/cpu1/online file!

    |-----------------------------------------------------------------------------------|

    | VDD_CORE / VDD_CORE0   | 62C / 143F | NA     |               | UNKNOWN         |

    |   L3                   |             |         | 265 MHz     |                 |

    |   DMM                 |             |         | 265 MHz     |                |

    |   EMIF1               |             |         | 265 MHz     |                 |

    |   EMIF2               |             |         | 265 MHz     |                 |

    |     LP-DDR2           |             |         | 666 MHz     |                |

    |   L4                   |             |         | 265 MHz     |                 |

    |   IPU1                 |             |         | (2127 MHz) (1) |                 |

    |     Cortex-M4 Cores   |             |         | (1063 MHz) (1) |                |

    |   IPU2                 |             |         | (2127 MHz) (1) |                 |

    |     Cortex-M4 Cores   |             |         | (1063 MHz) (1) |                 |

    |   DSS                 |             |         | 192 MHz     |                |

    |   BB2D                 |             |         | (2127 MHz) (1) |                 |

    |                       |             |         |               |                 |

    | VDD_MPU / VDD_CORE1   | 62C / 143F | NA     |               | UNKNOWN         |

    |   MPU (CPU1 OFF)       |             |         | 499 MHz     |                 |

    |                       |             |         |               |                 |

    | VDD_GPU / VDD_CORE2   | 62C / 143F | NA     |               | NOM            |

    |   GPU                 |             |         | 425 MHz     |                 |

    |                       |             |         |               |                 |

    | VDD_DSPEVE / VDD_CORE3 | 61C / 141F | NA     |               | NOM             |

    |   DSP1                 |             |         | (600 MHz) (1) |                 |

    |   DSP2                 |             |         | (600 MHz) (1) |                 |

    |   EVE1                 |             |         | (0   MHz) (1) |                |

    |   EVE2                 |             |         | (0   MHz) (1) |                 |

    |                       |             |         |               |                 |

    | VDD_IVA / VDD_CORE4   | 62C / 143F | NA     |               | NOM             |

    |   IVA                 |             |         | 388 MHz     |                 |

    |                       |             |         |               |                 |

    |-----------------------------------------------------------------------------------|

  • There are two parameters that changed, did you do both of them?

    -   {625, 11, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1},        /* 19.2 MHz */
    +   {312, 9, 1, 1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */


    We cannot rely on BogoMIPS is the feedback I got from the team.

  • Vishal, it's ok now. The frequency is 599M (in omapconf show opp).

    Thank you very much.

  • Hi,

    Could you open a new e2e ticket for missing cpufreq sysfs entries?

    Regards,
    Vishal