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AM3352: Changing console from UART0 to UART1

Part Number: AM3352
Other Parts Discussed in Thread: MAX3232E

Hi team,

Customer is evaluating AM335x with AM335x TI GP-EVM, I received some inquiries about UART0/1 handling.

1. Changing the default debug console on the AM335x from UART0 to UART1.

Customer would like to change UART0 console to UART1 console. Regarding am335x-evm.dts, customer confirmed UART0/UART1 were selected. Could you elaborate how customer should do procedure, please?

Customer is using PROCESSOR-SDK-LINUX-AM335X(06_03_00_106). Customer just tried to set up the following command on u-boot, however, there is not any change.

=> setenv console ttyO1,115200n8 

 

2.UART1 communication

Customer is trying to communicate UART1 using the J10 connector on daughter board with AM335xGP-EVM

Regarding am335x-evm.dts, customer confirmed UART0/UART1 were selected. However, customer was not able to communicate with UART port1. Is there any setting/modification which customer should do? Regarding baud-rate, customer was set 115200bps to UART0(/dev/ttyS0) and UART1(/dev/ttyS1). For UART0 port, customer was able to confirmed UART0 worked with dmsg. Can we have your Expert's advice/comments on this, please?

Best regards,

Miyazaki

  • Miyazaki-san,

    Takayuki Miyazaki said:
    Changing the default debug console on the AM335x from UART0 to UART1.

    There's a description (including a PATCH) showing you exactly where you need to make modifications to change the console UART in both U-Boot and Linux on AM335x in this E2E post here: https://e2e.ti.com/support/processors/f/791/p/905798/3349581#3349581

    This topic is also discussed in the "Customize console UART settings" section in our AM335x U-Boot board-port guide located here: https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/AM335X/linux/How_to_Guides/Board_Port/U-Boot.html

    Takayuki Miyazaki said:
    Customer is trying to communicate UART1 using the J10 connector on daughter board with AM335xGP-EVM

    Some things to double-check:

    • UART1 will need to be set to status = "okay" in the DTS to enable it
    • Make sure the pinmux matches the board/connections (should already be in case of using the original AM335x EVM with am335x-evm.dts)
    • Try outputting something directly to the UART device in Linux by doing echo Test > /dev/ttyS1

    Regards, Andreas

  • Hello Andreas,

    Thank you for your helpful comments.  I'd like to wait customer's feedback for a while.

    best regards,

    Miyazaki

  • Hello Andreas,

     

    Regarding UART1 communication, I received customer's feedback. customer was not able to resolve this issue yet. Customer confirmed them as follows.

     

    >1. UART1 will need to be set to status = "okay" in the DTS to enable it

    Customer confirmed status = "okay" for UART1 in am335x-evm.dts

    >2. Make sure the pinmux matches the board/connections (should already be in case of using the original AM335x EVM with am335x-evm.dts)

    Customer believes there is not any issue for this.

    uart1_pins: pinmux_uart1_pins {
    
    pinctrl-single,pins = <
    
       AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)
    
       AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
    
       AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)
    
       AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
    
    >;
    
    };

    After that, customer did " echo Test > /dev/ttyS1", it still failed. Is there any other check-points for this?

    Although I tried to check daughter-board schematic, I was able to check it because of Orcad file.  it will be appreciated if you will share your advice again. 

    Best regards,

    Miyazaki

  • Miyazaki-san,

    Takayuki Miyazaki said:
    After that, customer did " echo Test > /dev/ttyS1", it still failed. Is there any other check-points for this?

    Where did the customer try to connect to the UART1 signals (AM335X_UART1_TXD @ ball D15, AM335X_UART1_RXD @ ball D16)? Reviewing the documentation at https://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_HW_User_Guide there does not seem to be a way to readily access those signals without making modifications to a board despite it may seem like one can easily route those signals to one of the other DB9 connectors. This E2E post here confirms that: https://e2e.ti.com/support/processors/f/791/t/550858?AM335x-GP-EVM-profile-for-UART1

    What you could do is the following:

    1. Install R225, R229, R232, and R236 on the CPU board. Remove R354, R355, R356, and R357. Then access the (logic-level) UART signals directly through the expansion connector J5. Then, they should also be available on the daughter board connector J10 as per schematic (more below).
    2. Access the UART signals (logic level, and shifted to 1.8V) through the COM connector (J11)

    Also, your DTS file looks good, assuming a connection via device balls D15 and D16.

    Takayuki Miyazaki said:
    Although I tried to check daughter-board schematic, I was able to check it because of Orcad file.  it will be appreciated if you will share your advice again.

    Attached a PDF version of the AM335x GP Daughterboard schematic. I've also submitted an internal request (ref: SUBARCTICAPPS-169) to have that PDF document added to the official AM335x GP Daughteboard schematic package (TI lit # sprr165).

    Regards, Andreas

    am335x_gpevm_gpdboard_3h0001_schematic_rev1_2b.pdf

  • Hello Andreas,

    I got feedback from customer at this time. It seems customer has still issue. I mean, customer was not able to confirm UART1 signals on daughter board connector J10. Customer was able to confirm UART1 signals on daughter board connector J3. But, there is U43C(Altera EPM2210F324) between J3 and J10. It does not seem that this cPLD passes through UART1 signals. Could you elaborate how customer is able to configure, please?

    Bes regards,

    Miyazaki

  • Miyazaki-san,

    Takayuki Miyazaki said:
    Customer was able to confirm UART1 signals on daughter board connector J3.

    Does this mean the customer can receive/send (logic-level) UART data through J3?

    Takayuki Miyazaki said:
    But, there is U43C(Altera EPM2210F324) between J3 and J10. It does not seem that this cPLD passes through UART1 signals.

    If I remember correctly the schematic I had looked at did not have the FPGA in the signal path.

    What specific board revision is the customer using? It should be printed on the base board and the daughter board. With knowing the specific version I'd be able to have another close look.

    Regards, Andreas

  • Hi Andreas,

    Yes, Customer was able to confirm UART1 signals on J3 connector (daughter board) after resisters modification, as you had advised. According to “am335x_gpevm_gpdboard_3h0001_schematic_rev1_2b.pdf” which you shared with us previously( on above thread), I noticed there is FPGA on this board. This means, I believe that the revision of daughter board is v1.2b. as far as I tried to check this schematic, I don’t believe there is any configuration pins of FPGA. 

    Best regards,

    Miyazaki

  • Miyazaki-san,

    I just double-checked the schematic, yes indeed, the CPLD is in the signal path as you reported earlier, as there are differently labeled signals being used (UART1_TXD vs AM335x_UART1_TXD for example, something I didn't notice before).

    Looking at the am335x_gpevm_pinuse.xlsx spreadsheet (see https://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_HW_User_Guide under "Functional Interface Mapping") again available online that shows how the CPLD muxes the signals across the different profiles that are selectable I don't see way to route those with what is supported by the CPLD programming. My recommendation would be to either use some blue wires to get the UART1 signal off board to an USB-based logic-level-to serial converter (from FTDI for example) to make it accessible, or to patch/rework the board itself to bypass the CPLD.

    Regards, Andreas

  • Hi Andreas,

    Thank you for your clarification.

    Although I also have tried to looked for profile setting (DIP Switch SW8) of cPLD on daughterboard, I was not able to find the detail information. But, I found vhdl source code for cPLD (https://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_CPLD). According to this source code, I noticed AM335X_UART1 signals were not connected to UART1 signals, regardless of configuration-pins(Profile setting) . Therefore, I will suggest customer to use some blue wires to get the UART1 signals to U15(MAX3232E) if possible. I believe it is easy way.  I'd like to wait for customer's feedback for a while.

    Best regards,

    Miyazaki

  • Hello Andreas-san,

    Customer understood  this. Thank you for your advice.

    Best regards,

    Miyazaki