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AM4372: DMA access during DDR self-refresh

Sh.Sasaki
Guru 13625 points

Part Number: AM4372

Hi experts,

Which of the following actions will occur when accessing DDR3 with DMA during DDR3 self refresh?

  1. DMA can't access DDR until the self-refresh is complete.
  2. EMIF stops self-refreshing, so DMA can access DDR immediately.

Best regards,
Sasaki

  • 0
    TI__Guru* 95741 points

    Sasaki, the controller IP does have the ability to go in and out of self-refresh automatically based on the timeout values set in POWER_MANAGEMENT_CTRL register, but we recommend to control self-refresh more manually from software, and thus you should be disabling DMA before entering self-refresh, and re-enable it after exiting self-refresh.  

    Regards,

    James

  • 0 in reply to JJD
    Guru 13625 points

    Hi James-san,

    Thank you for your reply.

    JJD said:

    Sasaki, the controller IP does have the ability to go in and out of self-refresh automatically based on the timeout values set in POWER_MANAGEMENT_CTRL register, but we recommend to control self-refresh more manually from software, and thus you should be disabling DMA before entering self-refresh, and re-enable it after exiting self-refresh.  

    I got it.

    Best regards,
    Sasaki