Part Number: 66AK2E05
We are testing a custom 66AK2E05 board and we have 2x miniPCIe slots included for standard miniPCIe modules. We have used the K2E-EVM kernel & dts as a starting point and enabled PCIE 0 & PCIE Phy 0 in the dts. However, it seems that none of the PCIe PHYs are properly enabled and the PLLs are not locked. We are using ProcSDK 6.03 at the moment and we have also tested with 6.01 with the same results.
I have seen other related threads, in one of them the issue was mixing an older U-boot versions from MCSDK with ProcSDK kernel. We are using ProcSDK U-boot and kernel based on the K2E-EVM with minor changes to run on our board. The only differences that may be related to PCIe are the SoC clock (we use the 1400MHz version), the absence of an onboard PCIe slave (SATA controller on EVM) and enabling both PCIe controllers in dts.
The relevant part of the .dts is:
&pcie0_phy {
status = "okay";
};
&pcie0 {
ti,syscon-pcie-id = <&pcie_devid>;
ti,syscon-pcie-mode = <&pcie_mode>;
status = "okay";
};
&pcie1_phy {
status = "okay";
};
&pcie1 {
status = "okay";
};
I had to add the two extra lines in pcie0 because I was getting a "failed to initialize host" error in dmesg and pcie0 was not shown in lspci. I noticed they were present in pcie1 dts configuration but not in pcie0 so I tried adding them and it worked. Let me know if there is something else I need to do with these.
It seems that our problem is that the PLL is not locked and in dmesg we get:
[ 2.422991] keystone-pcie 21800000.pcie: Phy link never came up [ 3.428077] keystone-pcie 21020000.pcie: Phy link never came up
The relevant PCIe Serdes registers are:
Reg 0x02321FE0 and 0x02327FE0 = 1
Reg 0x02321FE4 and 0x02327FE4 = 1
Reg 0x02321FF4 and 0x02327FF4 = 0
This is the same regardless of whether we have a miniPCIe module (COTS, verified on a PC host) plugged in or not.
We are stumbling on this issue, it is one of the last parts of the board / SoC to be verified and we would like support from TI. Does it seems like there is a problem with the SoC / Linux / dts configuration or the PCIe link with the slave card?
Any help appreciated.
Related E2E threads (I could not create a related question):
