Does TMS320C6A816x support DDR3 new function - write leveling? It is related to layout topology of address and control signals. Which topology to use - fly-by or tree? I would like to know when DDR3 layout note will be ready, too.
Thanks.
Kevin
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Does TMS320C6A816x support DDR3 new function - write leveling? It is related to layout topology of address and control signals. Which topology to use - fly-by or tree? I would like to know when DDR3 layout note will be ready, too.
Thanks.
Kevin
Damiano,
This is now available on the TI product folder here...
http://focus.ti.com/docs/prod/folders/print/tms320dm8148.html
BR,
Steve