TMS320C6748: Data transfer rate between THR and TSR in UART FIFO mode

Hi,

We are developing an application for a TMS320C6748 device and we are observing and unexpected behaviour related to UART data transmission. Our UART transmission settings are the following:

- 8 Bit, 1 Stop Bit, no parity 16 Kbauds

- FIFO mode

- Disabled interrupts (transmitter register availability checked by polling)

Our application implements a 125 Hz loop (very accurate, as checked with a GPIO flag and an oscilloscope) sending on each iteration up to 16 Bytes, so as to fill the THR 16-byte FIFO. This means: 125 Hz * 16 Bytes * 8 bits = 16 KBauds, which is exactly the serialization rate we define for the UART module. This should mean that the UART module should be able to transfer the data to THR to TSR and serialize it in the same rate the SW application places more data in THR, so it should work fine.

Nevertheless, this was not what we observed. When the SW application reaches this maximum16 KBaud data rate (transferring 16 bytes into THR on each cycle), we found that the THR was not empty each time the application tried to send new data. However, in the other end-point, we observed that the UART output serialization data rate was actually16 KBauds, since a PC serial port application was able to receive the data with that baudrate configured. Since the UART driver we have implemented waits actively for THR to get empty on each cycle so as to transfer up to 16 new bytes, we found that we had no longer a 125 Hz loop (8ms period), but instead a slower, 9.505 ms period loop, which was the time required for the THR to get empty.

The obvious conclusion is that the rate at which the data is transferred from the THR FIFO to the TSR register is not the same at which the UART serializes the data from TSR. Moreover, when increasing progressively the UART baudrate, we saw that the emptying rate of the THR increased accordingly, reaching the seeked 16 KBauds when the output serializing rate was around 20 KBauds. At this point, the SW application had no timeouts in the 125 Hz loop since the THR emptying rate was fast enough.

This behaviour was not observed when receiving data, the reception rate of the SW can be set to the same baudrate of the UART with no problems.

We are pretty sure our time measurements are accurate and we have performed different tests that confirm this behaviour. Our conclusion is that this HW module is not conceived to be used with SW transmission speeds similar to the UART baudrate, which seems very weird.

We have figured out a different sending strategy that fits our requirements, but we would like the opinion of an expert on this issue to know what is the reason of this behaviour, which is not described at all in the User's Reference Guide and we think is quite limiting.

Thanks in advance,

David