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AMIC110: EtherCAT PHY problem

Part Number: AMIC110
Other Parts Discussed in Thread: TMDXICE110

Hi,

we designed a custom board with the AMIC110 pretty much similar to the Evaluation Board TMDXICE110 (circuit shematics appended). However, on all prototypes we encouter the same problem while running one of the Ethercat sample applications. If Twincat is connected to the board via PHY1 (phy addr 1 / D700 in circuit shematics) everything is working as expected. However, if we connect the cable via the other PHY2 (D800 in circuit shematics / adddr 13) it is not working.

Investigations with the oscilloscope on the phy2 signals showed, that while Ethercat packages are sent from Twincat (also visble with WireShark) the PHY is sending data on the RX[0:3] lines (most likely reception OK, also no RX_error). The phy clocks show good signal as well. However, no signals on the TX lines as well as no TX_EN signal. In the Software Initialisation both PHYs are found on the MDIO bus with its correct addresses and the registers can be read and written to. So far we are not able to narrow to problem to either a Software or Hardware Problem and any input is highly appreciated.

Thank you very much in advance and best regards

Philipp 

/cfs-file/__key/communityserver-discussions-components-files/791/amic110_5F00_problem.zip

  • Hi Philipp,

    Have you tried to run the ICSS_EMAC loopback example from PDK for AMIC110 ICE and then check PRU statistics? status 

    You will need a Ethernet loopback adapter to run the test.

    Regards,

    Garrett

     

  • Hi Garrett,

    I finally managed to get the ICSS_EMAC_Switch Example to run. For some reason it only works with non-instrumented libs etc but this should be topic for another issue i guess.

    The important part is, I tested our board with the simple Tx/Rx test and it works for both ports. For this i changed the  "txArgs.portNumber" to 1 or 2 respectively and double checked it only sends on either port with wireshark. If you suggest a better method please let me know.

    Now back to my original EtherCat problem. I  think the above test shows the bootstrap configuration of the PHY should be fine as well as no other hardware problems. The only major difference i see in the circuit shematics between our board and the eval board is, that on the eval board the LED pins from the phy are connected to the amic110 and are initialized as inputs. Is it possible the ethercat binary or framehandler running on the PRU need these for LINK UP/Down detection or something like that?

    Thanks in advance and best regards

    Philipp

  • Philipp,

    Please refer to the 'enhanced link detection' section in the trouble shooting guide - https://www.ti.com/lit/an/spracj7/spracj7.pdf

    Yes, the LED pins from phy is connect to AMIC110 MII for enhanced detection which can be optionally disabled for debugging.

    Regards,

    Garrett

  • Hi Garrett,

    thanks for the super fast response. This solved my problem immediately.

    Cheers

    Philipp

    Edit: Sorry for marking my own response as the solution please undo if possible