[Originally posted at http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/100/p/35958/315150.aspx#315150 , but received no responses so I moved the questions here. :-) ]
Hello Everyone,
I plan to boot the DM365 in "external reset mode" and will be setting PWRST low and PWRCNTON high. In this mode, other posters have shown the GPIO to be usable [see link above]. My question is two-fold:
1. Will the GIO inputs to the PRTCSS still function as interrupts in this mode? Essentially, we are trying to use the PRTCSS GIO interrupt-capable inputs to increase the number of interrupt-capable IO that go directly to the ARM. As per ARM Subsystem user guide SPRUFG5A table 54, we plan to use PWRGIO[2:0] as input interrupts.
2. Since we don't need the calendar function, we'll leave the 32.768kHz crystal disconnected. We will connect RTCXI to GND, RTCXO will float, but where do we connect the VSS_32k pin?
Many thanks,
Mike
