OMAP-L138: Infinite Loop in the ARM Local ROM

hamid reza mehrabian

Part Number: OMAP-L138

Hi,

I have a custom board for my project with an OMAP-L138 SoC. I have my own bootloader that will run a TI-RTOS based firmware. I have a NOR flash on my board and bootloader has been generated by AIS generator for this 16-bits NOR.

My SW/HW works well often. My problem is a infinite loop in the "ARM Local ROM" region that occurs sometimes. You can see its address in the below picture. I want to know, what is the condition for this loop?

Is this a SW problem or a HW problem? I think when the ARM gets stuck in this loop, my bootloader is not running yet. is it true?
Thanks in advance.

over 5 years ago

0 medu ehtesh over 5 years ago

Prodigy 30 points

Hello Hamid,

In the first please check the sequence voltage of your SOC. If it is true, check the clock Frequency.

0 Mukul Bhatnagar over 5 years ago

TI__Guru* 83975 points

Hi Hamid

How many boards have you built and how many do you see this issue with?

If the code is getting stuck in ROM , it is either not getting the secondary boot loader properly or there is some software error or exception that is causing it to go back to somewhere in ROM due to chip reset etc.

It is hard to say what is going on with the limited information on this thread - it can be a hardware or software issue.

Perhaps start with the following application note

https://www.ti.com/lit/an/spracm8/spracm8.pdf

There is a section on debug, that talks about leveraging a gel file to understand what maybe happening during the boot process etc.

Please share the output of that gel file , connecting to JTAG after the failure happens to see if it helps diagnose the issue further.

Regards

Mukul

0 hamid reza mehrabian over 5 years ago in reply to Mukul Bhatnagar

Prodigy 240 points

Thanks for your reply Mukul Bhatnagar

I just have a prototype board and working on it currently. Below is the diagnostics report that generated by "OMAPL1x_debug" GEL file:

ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: |             Device Information            |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: DEV_INFO_00 = 0x1B7D102F
ARM9_0: GEL Output: DEV_INFO_01 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_02 = 0x00000002
ARM9_0: GEL Output: DEV_INFO_03 = 0x00000035
ARM9_0: GEL Output: DEV_INFO_04 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_05 = 0x000003E0
ARM9_0: GEL Output: DEV_INFO_06 = 0x00000080
ARM9_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 0-0-3937517-20-37-31
ARM9_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 5,0,0,13268
ARM9_0: GEL Output: -----
ARM9_0: GEL Output: DEV_INFO_17 = 0x00030003
ARM9_0: GEL Output: DEV_INFO_18 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_19 =ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 0ARM9_0: GEL Output: 
ARM9_0: GEL Output: -----
ARM9_0: GEL Output: DEV_INFO_20 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_21 = 0x00000000
ARM9_0: GEL Output: DEV_INFO_22 = 0x30303864
ARM9_0: GEL Output: DEV_INFO_23 = 0x3830306B
ARM9_0: GEL Output: -----
ARM9_0: GEL Output: DEV_INFO_24 = 0x1401F025
ARM9_0: GEL Output: DEV_INFO_25 = 0x003C14ED
ARM9_0: GEL Output: DEV_INFO_06 = 0x00000080
ARM9_0: GEL Output: DEV_INFO_26 = 0x67A80005
ARM9_0: GEL Output: 

ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: |               BOOTROM Info                |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: ROM ID: d800k008 
ARM9_0: GEL Output: Silicon Revision UNKNOWN
ARM9_0: GEL Output: Boot Mode: NOR
ARM9_0: GEL Output: 
ROM Status Code: 0x00000005 
Description:ARM9_0: GEL Output: Peripheral Open Failed
ARM9_0: GEL Output: 
Program Counter (PC) = 0xFFFD45E0
ARM9_0: GEL Output: 
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: |              Clock Information             |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: 
ARM9_0: GEL Output: PLLs configured to utilize crystal.
ARM9_0: GEL Output: ASYNC3 = PLL0_SYSCLK2
ARM9_0: GEL Output: 
ARM9_0: GEL Output: NOTE:  All clock frequencies in following PLL sections are based
ARM9_0: GEL Output: off OSCIN = 24 MHz.  If that value does not match your hardware
ARM9_0: GEL Output: you should change the #define in the top of the gel file, save it,
ARM9_0: GEL Output: and then reload.
ARM9_0: GEL Output: 
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: |              PLL0 Information             |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: 
ARM9_0: GEL Output: PLL0_SYSCLK1 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK2 = 12 MHz
ARM9_0: GEL Output: PLL0_SYSCLK3 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK4 = 6 MHz
ARM9_0: GEL Output: PLL0_SYSCLK5 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK6 = 24 MHz
ARM9_0: GEL Output: PLL0_SYSCLK7 = 4 MHz
ARM9_0: GEL Output: 
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: |              PLL1 Information             |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: 
ARM9_0: GEL Output: PLL1_SYSCLK1 = 24 MHz
ARM9_0: GEL Output: PLL1_SYSCLK2 = 12 MHz
ARM9_0: GEL Output: PLL1_SYSCLK3 = 24 MHz
ARM9_0: GEL Output: 
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: |              PSC0 Information             |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: 
ARM9_0: GEL Output: State Decoder:
ARM9_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
ARM9_0: GEL Output:  1 = SyncReset (reset assered, clock on)
ARM9_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
ARM9_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
ARM9_0: GEL Output: >3 = Transition in progress
ARM9_0: GEL Output: 
ARM9_0: GEL Output: Module 0:	EDMA3CC (0)        STATE = 0
ARM9_0: GEL Output: Module 1:	EDMA3 TC0          STATE = 0
ARM9_0: GEL Output: Module 2:	EDMA3 TC1          STATE = 0
ARM9_0: GEL Output: Module 3:	EMIFA (BR7)        STATE = 3
ARM9_0: GEL Output: Module 4:	SPI 0              STATE = 0
ARM9_0: GEL Output: Module 5:	MMC/SD 0           STATE = 0
ARM9_0: GEL Output: Module 6:	AINTC              STATE = 3
ARM9_0: GEL Output: Module 7:	ARM RAM/ROM        STATE = 3
ARM9_0: GEL Output: Module 9:	UART 0             STATE = 0
ARM9_0: GEL Output: Module 10:	SCR 0 (BR0/1/2/8)  STATE = 3
ARM9_0: GEL Output: Module 11:	SCR 1 (BR4)        STATE = 3
ARM9_0: GEL Output: Module 12:	SCR 2 (BR3/5/6)    STATE = 3
ARM9_0: GEL Output: Module 13:	PRUSS              STATE = 0
ARM9_0: GEL Output: Module 14:	ARM                STATE = 3
ARM9_0: GEL Output: Module 15:	DSP                STATE = 0
ARM9_0: GEL Output: 
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: |              PSC1 Information             |
ARM9_0: GEL Output: ---------------------------------------------
ARM9_0: GEL Output: 
ARM9_0: GEL Output: State Decoder:
ARM9_0: GEL Output:  0 = SwRstDisable (reset asserted, clock off)
ARM9_0: GEL Output:  1 = SyncReset (reset assered, clock on)
ARM9_0: GEL Output:  2 = Disable (reset de-asserted, clock off)
ARM9_0: GEL Output:  3 = Enable (reset de-asserted, clock on)
ARM9_0: GEL Output: >3 = Transition in progress
ARM9_0: GEL Output: 
ARM9_0: GEL Output: Module 0:	EDMA3CC (1)        STATE = 0
ARM9_0: GEL Output: Module 1:	USB0 (2.0)         STATE = 0
ARM9_0: GEL Output: Module 2:	USB1 (1.1)         STATE = 0
ARM9_0: GEL Output: Module 3:	GPIO               STATE = 0
ARM9_0: GEL Output: Module 4:	UHPI               STATE = 0
ARM9_0: GEL Output: Module 5:	EMAC               STATE = 0
ARM9_0: GEL Output: Module 6:	DDR2 and SCR F3    STATE = 0
ARM9_0: GEL Output: Module 7:	MCASP0 + FIFO      STATE = 0
ARM9_0: GEL Output: Module 8:	SATA               STATE = 0
ARM9_0: GEL Output: Module 9:	VPIF               STATE = 0
ARM9_0: GEL Output: Module 10:	SPI 1              STATE = 0
ARM9_0: GEL Output: Module 11:	I2C 1              STATE = 0
ARM9_0: GEL Output: Module 12:	UART 1             STATE = 0
ARM9_0: GEL Output: Module 13:	UART 2             STATE = 0
ARM9_0: GEL Output: Module 14:	MCBSP0 + FIFO      STATE = 0
ARM9_0: GEL Output: Module 15:	MCBSP1 + FIFO      STATE = 0
ARM9_0: GEL Output: Module 16:	LCDC               STATE = 0
ARM9_0: GEL Output: Module 17:	eHRPWM (all)       STATE = 0
ARM9_0: GEL Output: Module 18:	MMC/SD 1           STATE = 0
ARM9_0: GEL Output: Module 19:	UPP                STATE = 0
ARM9_0: GEL Output: Module 20:	eCAP (all)         STATE = 0
ARM9_0: GEL Output: Module 21:	EDMA3 TC2          STATE = 0
ARM9_0: GEL Output: Module 24:	SCR-F0 Br-F0       STATE = 3
ARM9_0: GEL Output: Module 25:	SCR-F1 Br-F1       STATE = 3
ARM9_0: GEL Output: Module 26:	SCR-F2 Br-F2       STATE = 3
ARM9_0: GEL Output: Module 27:	SCR-F6 Br-F3       STATE = 3
ARM9_0: GEL Output: Module 28:	SCR-F7 Br-F4       STATE = 3
ARM9_0: GEL Output: Module 29:	SCR-F8 Br-F5       STATE = 3
ARM9_0: GEL Output: Module 30:	Br-F7 (DDR Contr)  STATE = 3
ARM9_0: GEL Output: Module 31:	L3 RAM, SCR-F4, Br-F6 STATE = 3

0 hamid reza mehrabian over 5 years ago in reply to Mukul Bhatnagar

Prodigy 240 points

For more details:
The CCS memory browser at the 0x60000000 address shows duplicate values for each two bytes ( Our NOR flash is 16-bits and I know by default EMIFA access mode is 8-bits ). It seems that EMIFA access mode did not configure. I think ROM was unable to read "NOR Boot Configuration Word" OR it is possible a restart has been occurred by a critical issue during running my own bootloader. Although I have handled all of the ARM exceptions.
Thanks again.

0 Mukul Bhatnagar over 5 years ago in reply to hamid reza mehrabian

TI__Guru* 83975 points

Ok, good to see that maybe you have found one issue on what you were expecting vs what the ROM is seeing. Are you able to further work on figuring out why the configuration that you are passing is not for NOR 16 and seems to be NOR 8 instead? Please look at other sections in the same application note.

I am assuming the ARM getting stuck in ROM infinite loop happens primarily during boot from NOR - not something that happens if you were to just work with JTAG/ No Boot etc?

If you are seeing ARM to be stuck in ROM during other non boot operations, you may have other glitches/issues in your board that maybe causing an exception (hard to diagnose with the information we have).

Does NOR boot work on your custom board occasionally or has it never worked? If it has never worked, please focus on resolving that first before we dwell further into looking at other reasons of why ARM could be stuck in the infinite loop/exception etc.

0 hamid reza mehrabian over 5 years ago in reply to Mukul Bhatnagar

Prodigy 240 points

Thanks Mukul Bhatnagar and medu ehtesh.

We solved this issue. The primary problem was SoC Reset Output. Because of a hardware problem, SoC Reset Output pin was about 2V and NOR flash assumed it as LOW sometimes and was going to RESET state. So, SoC was unable to read NOR Flash data.

Thanks again.

0 Mukul Bhatnagar over 5 years ago in reply to hamid reza mehrabian

TI__Guru* 83975 points

Thanks for updating and closing the thread. Good to know that you were able to find the issue and fix it.

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OMAP-L138: Infinite Loop in the ARM Local ROM