66AK2H14: About MSI interrupts

Hi,

Can you clarify if this is tested on C66x core or A15 core? Where the test code came from? I don't recall PRSDK RTOS PCIE driver has MSI example for K2H. Is this you own code? If it is, can you share it how you program the MSI_ADDR, MSI_DATA and what is enabled in RC side?

>>> writing 0,8,16,24 to MSI_IRQ >>> you wrote from EP into RC's MSI_IRQ for testing? Or, you just write you own MSI_IRQ for proof or concept?

Adding: when you saw MSI 1, 9, 17... didn't work, did you see MSI1_IRQ_STATUS_RAW bit set?

Regards, Eric

Hi

I'm running RTOS on C66x core0, it acts as Root complex, FPGA is end point. For testing purposes I write on my own  to MSI_IRQ  using memory browser.I got the code from  a previous project  on C6678, a coworker wrote it years ago. Here is the code:

#define IRQ_EOI_ADDR                    (0x21800050)
#define MSI_IRQ_ADDR                    (0x21800054)
#define MSI0_IRQ_RAW_STATUS_ADDR        (0x21800100)
#define MSI0_IRQ_STATUS_ADDR            (0x21800104)
#define MSI0_IRQ_ENABLE_SET_ADDR        (0x21800108)
#define MSI0_IRQ_ENABLE_CLR_ADDR        (0x2180010C)
#define MSI0_IRQ_EOI_VALUE              (4) //see table 2-10 in PCIe user guide

Void InterruptSetup()
{

  Hwi_Params hwiParams;
  Error_Block eb;

  Hwi_Params_init(&hwiParams);
  Error_init(&eb);
  hwiParams.enableInt = true;
  hwiParams.arg = (UArg)this;
  hwiParams.priority = 5;
  hwiParams.eventId = 17;
  hwiParams.maskSetting = Hwi_MaskingOption_SELF;
  Hwi_create(6, (ti_sysbios_hal_Hwi_FuncPtr)msiSR, &hwiParams, &eb);
}

void msiSR()
{

    numberOfIRQ++;

   unsigned int status;

//clear status flag in MSI_IRQ_STATUS register
status = *f_msi_irq_status;
*f_msi_irq_status = status;


//indicate end-of-interrupt in IRQ_EOI register
*f_irq_eoi = f_irq_eoi_value; //0x4 for MSI 0/8/16/24, table 2-10 in PCIe user guide

}

void initRegValues(unsigned int coreId)
{


    f_irq_eoi =             (volatile unsigned int*)(IRQ_EOI_ADDR);
    f_msi_irq_status =      (volatile unsigned int*)(MSI0_IRQ_STATUS_ADDR     + 0x10*coreId);
    f_msi_irq_enable_set =  (volatile unsigned int*)(MSI0_IRQ_ENABLE_SET_ADDR + 0x10*coreId);
    f_msi_irq_enable_clr =  (volatile unsigned int*)(MSI0_IRQ_ENABLE_CLR_ADDR + 0x10*coreId);
    f_irq_eoi_value =        MSI0_IRQ_EOI_VALUE + coreId;

}

int enableMSIIrq()
{
    //enable PCIe MSI Interrupt
   *f_msi_irq_enable_set = 0xF; 

    return 0;
}

//This is the main 

void main()
{
InterruptSetup();
initRegValues(0);
 enableMSIIrq();

}

To test other Irq, I change  initRegValues(0)   to  initRegValues(1), initRegValues(2) , etc...

"when you saw MSI 1, 9, 17... didn't work, did you see MSI1_IRQ_STATUS_RAW bit set?"  --> Yes  I see  MSI1_IRQ_STATUS_RAW  and MSI1_IRQ_STATUS  set to 1

Regards,

Fabio