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AM6526: What causes the reset other than WDT ?

Hideaki Matsumoto
Genius 9100 points
Part Number: AM6526
Other Parts Discussed in Thread: UNIFLASH, AM6548

Hi,

 

The customer is now developing a software for writing code into Flash ROM via JTAG. For this implementation, they’re disabling a Watch Dog Timer (MCU_RTI0) which is set up by DMSC ROM by changing the register configuration. The WDT could be disabled, but a reset still occurred. It seemed that any other module made reset. The reason why they thought so that they observed the following phenomena in their steps below.

Do you know what makes the reset ? Could you tell them how to avoid this reset ?

 

1. Break at 0x41100000 in ROM when the ICE emulator was connected.

2. Write assembly code of jump at 0x41C00000 in MCU_MSRAM0

3. Restart after setting PC as 0x41C00000

4. Forced Break after some time, then PC in the ROM area

 

Thanks and regards,

Hideaki

  • 0
    TI__Mastermind 23125 points

    Hideaki, 

    I believe watchdog in the DMSC has been triggered, that reset the R5F, and caused the R5F code to be stuck in the ROM space. The DMSC set timeout the watchdog to a pretty long period, and ROM shall take care of it thereafter. Since you are not running ROM code, the DMSC WDT triggered. 

    To make sure I understand the steps customer has performed, could you clarify the following:

          "Flash ROM" means NOR Flash attached to the OPSI?

    If so, there shall be examples in the PDK to use JTAG writer. Once you confirm, I can point you to the directory.

    Regards

    jian

  • 0 in reply to jian35385
    TI__Genius 9100 points

    Jian,

    Thanks for your reply. The reset which they've seen is the watchdog in the DMSC ? However, they cannot modify the DMSC code, right ?

    Flash ROM means NOR Flash attached to the QSPI of the OSPI0 on their own board. Therefore, they need to develop the software to write into Flash. Is there any example ? or please tell them how to avoid the reset ?

    Thanks and regards,

    Hideaki

  • 0 in reply to Hideaki Matsumoto
    Mastermind 7450 points

    Hello Hideaki,

    you can connect to the DMSC core and disable the watchdog.

    There's a GEL file "romclean.gel" that comes with CCS (C:\ti\ccs1010\ccs\ccs_base\emulation\boards\am65x\gel\M4_bootROM\romclean.gel) that shows the necessary addresses and values. I've cut that GEL file down and wrapped the few lines that disable the watchdog in a hotmenu.

    Regards,

    Dominic

  • 0 in reply to Dominic Rath
    TI__Mastermind 23125 points

    Thanks Dominic for the hints. 

    Hedeaki, 

    the flash tool i referred is documented under the RTOS SDK -> 3.5.1.2. Supported Platforms:

    https://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_03_00_106/rtos/index_board.html#uniflash

    There is a table under this section shows supported devices. I am aware the uniflash tool does not support QSPI on AM65x. But have you checked if the manual JTAG programmer can be a good start for you?

    Jian

  • 0 in reply to Dominic Rath
    TI__Genius 9100 points

    Sorry, I made a mistake and made it Resolved.

    Dominic,

     

    Thank you for the hints. The customer would like to know the detail, and needs your help a little more. Is it possible to tell them more detail how to disable the watchdog on DMSC ?

     

    Thanks and regards,

    Hideaki

  • 0 in reply to jian35385
    TI__Genius 9100 points

    Jian,

     

    Thanks for your suggestion. The customer would like to know the detail of boot process.

    Their understanding is that DMSC ROM sets Watch Dog Timers on both DMSC and R5F in the boot process, and SYSFW releases these WDTs before A53 reset release, correct ?

     

    < ICE connection to DMSC >

    They want to connect ICE emulator to DMSC. Do they need any operation such like releasing lock to connect ICE emulator to DMSC ? (ex. ICEPICK setting, etc…)

    They are now able to connect to R5F and A53, but can’t connect to DMSC (M3). They’re referring to APSEL, but can’t find AHB-AP.

    Could you share any document how to connect ICE to DMSC ?

     

    Thanks and regards,

    Hideaki

  • 0 in reply to Hideaki Matsumoto
    Mastermind 7450 points

    Hello Hideaki,

    if you're refering to the hotmenu that I mentioned I've attached the GEL file that I'm loading.

    disable_dmsc_wdt.gel

    This isn't polished, and contains way too many defines from the romclean.gel that I used as a basis, but it works for me. I'm connected to the AM6548 via a XDS110 or a XDS200 and I'm currently using CCS 10.1. Connect to the DMSC, load the GEL file, select "Scripts -> rom -> disable_dmsc_wdt". The script has been working for me since CCS 8.x/9.x days.

    I don't think the registers are documented in the TRM, but the lines that I copied from romclean.gel are pretty self explanatory: Enable access to WDT registers via kick registers, set CLK_CTRL to 0xa ("magic value") disable access to WDT registers.

    Regards,

    Dominic

  • 0 in reply to Dominic Rath
    TI__Mastermind 23125 points

    Let us know if your customer was able try the GEL from Dominic. 

    DMSC is not intended to be customer-programmed thus there is no user manual in the TRM. Your understanding about DMSC WDT is correct, but it does not setup R5 watchdogs. 

    In your earlier post before Dominic's, customer seemed having issues:

      "... but can’t connect to DMSC (M3)."

    If this is the TI EVM, can you confirm you already tried in-stock ccs config file by following:

    https://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_03_00_106/rtos/index_how_to_guides.html#am65x-evm

    Jian

  • 0 in reply to jian35385
    TI__Mastermind 23125 points

    Dominic, 

    I will close this thread as waiting for  your response. please reopen when you have time to work on it we can resume. 


    Jian