C6457 HPI Maximum Sustained Throughput

TommyG

According to data manual (SPRS582B, sec 7.12.3) it seems that tw(HSTBL) + tw(HSTBH) are the specifications that define how fast the interface can operate. The value for 1.2 GHz CPU is 25 ns or 40 MHz which in HPI32 mode gives 160 MB/sec theoretical maximum. Is this a correct interpretation?

Is there any benchmark information on HPI throughput for real world implementation? Would like to see how close to theoretical max throughput is practical.

Thanks.

over 14 years ago

0 nmin Wu over 14 years ago

TI__Intellectual 910 points

it is a correct interpretation. When you do the block read/write, as the block size increases, the throughput increases. At large blocks such as 4K (assume back to back and strobe toggling at max speed.), real throughput will be close to the theretical max througput.

0 TommyG over 14 years ago in reply to nmin Wu

TI__Genius 13045 points

nmin Wu,

Thanks for the clarification.

Regards.

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C6457 HPI Maximum Sustained Throughput