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Logic PD OMAP35x SOM-LV_GPIO usage in custom carrier board design

3365.GPIOs.xls

Hello,

We are designing a custom carrier board for Logic PDs OMAP35x SOM-LV. Due to some design constraints  we are forced to use some of the GPIOs which are not recommended by Logic PD to use as GPIOs. Below are the details of signals we use as GPIOs.  Violated signals are highlighted in red and partially used modules are highlighted in violet. Whether we can use them based on the criteria mentioned in 'Function In Design' and 'Module Usage In Design' columns?

Please check the attachment if the table is not proper

Regards,

Thomas

 

Sl No SOM Signal Name SOM Connector Pin Number OMAP Ball Planned Use
Function In Design Direction WRT SOM OMAP Module Module Usage In Design
1 uP_UARTC_CTS J1-122 AB26 GPIO_144 Peripheral interrupt input IN UARTC UARTC is not used in design, The interfaces to WiFi and BT chips are not implemented in SOM (R121 and R18 not populated)
2 uP_UARTC_RTS J1-124 AB25 GPIO_145 Peripheral enable signal OUT UARTC UARTC is not used in design, The interfaces to WiFi and BT chips are not implemented in SOM (R121 and R18 not populated)
3 uP_UARTC_RX J1-126 AD25 GPIO_147 Peripheral interrupt input IN UARTC UARTC is not used in design, The interfaces to WiFi and BT chips are not implemented in SOM (R121 and R18 not populated)
4 uP_UARTB_CTS J1-136 H18 GPIO_163 Peripheral interrupt input IN UARTB UARTB is used in null modem configuration
5 uP_UARTB_RTS J1-138 H19 GPIO_164 Peripheral enable signal OUT UARTB UARTB is used in null modem configuration
6 uP_GPIO3 J1-142 B26 GPIO_111 Peripheral enable signal OUT GPIO GPIO
7 uP_GPIO2 J1-166 AA10 GPIO_31 Peripheral enable signal OUT GPIO GPIO
8 uP_SPI_CS1 J1-220 AF4 GPIO_135 Peripheral interrupt input IN SPI SPI is not used in design
9 uP_SPI_CS0 J1-222 AG4 GPIO_134 Peripheral interrupt input IN SPI SPI is not used in design
10 uP_SPI_SOMI J1-224 AH5 GPIO_132 Peripheral interrupt input IN SPI SPI is not used in design
11 uP_SPI_SIMO J1-226 AG5 GPIO_131 Peripheral interrupt input IN SPI SPI is not used in design
12 uP_SPI_SCLK J1-228 AE2 GPIO_130 Peripheral enable signal OUT SPI SPI is not used in design, 22E termination in SOM is ignorable