This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5728: Linux/AM572x : Taking the C66x Out of reset with linux running on the ARM A15 on AM572x SOC to debug problem with baremetal F/W

Part Number: AM5728

Dear Champs,

I trying to run a simple baremetal DSP F/W (just led blinking...) on AM5728 GP EVM B/D at LINUX environment. (Processor SDK Linux 06.03.00.106)

I checked my dsp f/w with CCS by JTAG debugger, and it worked OK !!!

(without any boot stage or holding at u-boot stage, both are OK.)

So, I copied an ".out" file to Linux file system path at "/lib/firmware/dra7-dsp1-fw.xe66".

and I rebooted a B/D to start DSP F/W with remoteproc at kernel boot sequence....

here is a kernel booting messages with remoteproc...

root@am57xx-evm:~# dmesg | grep remoteproc
[    7.535443] remoteproc remoteproc0: 58820000.ipu is available
[    7.701710] remoteproc remoteproc1: 55020000.ipu is available
[    7.852374] remoteproc remoteproc2: 40800000.dsp is available
[    7.948097] remoteproc remoteproc3: 41000000.dsp is available
[    8.115855] remoteproc remoteproc2: powering up 40800000.dsp
[    8.123015] remoteproc remoteproc2: Booting fw image dra7-dsp1-fw.xe66, size 742408
[    8.246866] remoteproc remoteproc0: powering up 58820000.ipu
[    8.252731] remoteproc remoteproc0: Booting fw image dra7-ipu1-fw.xem4, size 6884184
[    8.303815] remoteproc remoteproc1: powering up 55020000.ipu
[    8.309530] remoteproc remoteproc1: Booting fw image dra7-ipu2-fw.xem4, size 3875660
[    8.405192] remoteproc remoteproc0: registered virtio0 (type 7)
[    8.428313] remoteproc remoteproc0: remote processor 58820000.ipu is now up
[    8.709654] remoteproc remoteproc1: registered virtio1 (type 7)
[    8.741043] remoteproc remoteproc1: remote processor 55020000.ipu is now up
[    9.529444] remoteproc remoteproc3: powering up 41000000.dsp
[    9.536342] remoteproc remoteproc3: Booting fw image dra7-dsp2-fw.xe66, size 20483260
[    9.678107] remoteproc remoteproc3: registered virtio2 (type 7)
[    9.746024] remoteproc remoteproc3: remote processor 41000000.dsp is now up
[   14.241376] remoteproc remoteproc4: 4b234000.pru is available
[   14.296617] remoteproc remoteproc5: 4b238000.pru is available
[   14.312904] remoteproc remoteproc6: 4b2b4000.pru is available
[   14.328774] remoteproc remoteproc7: 4b2b8000.pru is available

I think something goes wrong with DSP1 F/W,

because there is no message : "remote processor 40800000.dsp is now up"

Here is a my code for DSP (simple status led blinking loop)

void main(void)
{
    //Pad configurations
    Board_initCfg boardCfg;
    boardCfg = BOARD_INIT_UNLOCK_MMR | BOARD_INIT_UART_STDIO |
               BOARD_INIT_MODULE_CLOCK | BOARD_INIT_PINMUX_CONFIG;
    Board_init(boardCfg);

    //Enable GPIO clock
    HW_WR_REG32(CSL_MPU_L4PER_CM_CORE_REGS+CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_GPIO7_CLKCTRL_REG,0x102);
    while ((HW_RD_REG32(CSL_MPU_L4PER_CM_CORE_REGS+CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_GPIO7_CLKCTRL_REG) & (0x00030000U)) != 0x0)
    {
        ;
    }

    GPIOModuleReset(CSL_DSP_GPIO7_REGS);
    GPIOModuleEnable(CSL_DSP_GPIO7_REGS);

    GPIODirModeSet(CSL_DSP_GPIO7_REGS, 8, GPIO_DIR_OUTPUT);
    GPIOPinWrite  (CSL_DSP_GPIO7_REGS, 8, GPIO_PIN_HIGH);

    GPIODirModeSet(CSL_DSP_GPIO7_REGS, 9, GPIO_DIR_OUTPUT);
    GPIOPinWrite  (CSL_DSP_GPIO7_REGS, 9, GPIO_PIN_HIGH);

    GPIODirModeSet(CSL_DSP_GPIO7_REGS, 14, GPIO_DIR_OUTPUT);
    GPIOPinWrite  (CSL_DSP_GPIO7_REGS, 14, GPIO_PIN_HIGH);

    GPIODirModeSet(CSL_DSP_GPIO7_REGS, 15, GPIO_DIR_OUTPUT);
    GPIOPinWrite  (CSL_DSP_GPIO7_REGS, 15, GPIO_PIN_HIGH);

HW_WR_FIELD32_RAW(GPO7_8_PINMODE_ADDR, PINMUX_SETMASK, 0, GPO7_8_PINMODE_VAL);
    HW_WR_FIELD32_RAW(GPO7_9_PINMODE_ADDR, PINMUX_SETMASK, 0, GPO7_9_PINMODE_VAL);
    HW_WR_FIELD32_RAW(GPO7_14_PINMODE_ADDR, PINMUX_SETMASK, 0, GPO7_14_PINMODE_VAL);
    HW_WR_FIELD32_RAW(GPO7_15_PINMODE_ADDR, PINMUX_SETMASK, 0, GPO7_15_PINMODE_VAL);

    while(1)
    {
        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 8, GPIO_PIN_HIGH);
        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 9, GPIO_PIN_LOW);
        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 14, GPIO_PIN_HIGH);
        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 15, GPIO_PIN_LOW);
        Delay(4000000);

        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 8, GPIO_PIN_LOW);
        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 9, GPIO_PIN_HIGH);
        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 14, GPIO_PIN_LOW);
        GPIOPinWrite(CSL_DSP_GPIO7_REGS, 15, GPIO_PIN_HIGH);
        Delay(4000000);
    }
}

I also blocked GPIO setting on kernel device tree that are related to Status Led GPIOs.

am57xx-beagle-x15-common.dtsi 

//         leds {
//                   compatible = "gpio-leds";

//                   led0 {
//                              label = "beagle-x15:usr0";
//                              gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
//                              linux,default-trigger = "heartbeat";
//                              default-state = "off";
//                   };

//                   led1 {
//                              label = "beagle-x15:usr1";
//                              gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
//                              linux,default-trigger = "cpu0";
//                              default-state = "off";
//                   };

//                   led2 {
//                              label = "beagle-x15:usr2";
//                              gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
//                              linux,default-trigger = "mmc0";
//                              default-state = "off";
//                   };

//                   led3 {
//                              label = "beagle-x15:usr3";
//                              gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
//                              linux,default-trigger = "disk-activity";
//                              default-state = "off";
//                   };
//         };

But after boot, status leds are all off. 

so I need to find out why a baremetal DSP f/w is not working.

In Linux environment, 

I found a debugging technic an "out of reset" with CCS & JTAG at below link :

http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_how_to_guides.html#taking-the-c66x-out-of-reset-with-linux-running-on-the-arm-a15

But, that contents are just for a C66x with EvmK2 !!

Not working on GP EVM AM5728....

Pop up error in CCS :

Error connecting to the target:
(Error -1180 @ 0x0)
Device is held in reset. Take the device out of reset, and retry the operation.
(Emulation package 9.2.0.00002)

and a log in CCS :

Cortex_M4_IPU1_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU2_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU2_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU2_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU2_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
C66xx_DSP1: GEL Output: --->>> AM572x C66x DSP Startup Sequence In Progress... <<<---
C66xx_DSP1: GEL Output: --->>> AM572x C66x DSP Startup Sequence DONE! <<<---
C66xx_DSP2: GEL Output: --->>> AM572x C66x DSP Startup Sequence In Progress... <<<---
C66xx_DSP2: GEL Output: --->>> AM572x C66x DSP Startup Sequence DONE! <<<---
CortexA15_0: GEL Output: --->>> AM572x Cortex A15 Startup Sequence In Progress... <<<---
CortexA15_0: GEL Output: --->>> AM572x Cortex A15 Startup Sequence DONE! <<<---
CortexA15_1: GEL Output: --->>> AM572x Cortex A15 Startup Sequence In Progress... <<<---
CortexA15_1: GEL Output: --->>> AM572x Cortex A15 Startup Sequence DONE! <<<---
Texas Instruments XDS2xx USB Debug Probe/C66xx_DSP1 : Target must be connected before loading program.
Texas Instruments XDS2xx USB Debug Probe/C66xx_DSP2 : Target must be connected before loading program.
IcePick_D: GEL Output: Ipu RTOS is released from Wait-In-Reset. 
IcePick_D: GEL Output: Ipu SIMCOP is released from Wait-In-Reset. 
IcePick_D: GEL Output: IVAHD C66 is released from Wait-In-Reset. 
IcePick_D: GEL Output: IVAHD ICONT1 is released from Wait-In-Reset. 
IcePick_D: GEL Output: IVAHD ICONT2 is released from Wait-In-Reset. 
C66xx_DSP1: Error connecting to the target: (Error -1180 @ 0x0) Device is held in reset. Take the device out of reset, and retry the operation. (Emulation package 9.2.0.00002)

and I tested additional test with below dsp code:

void main(void)
{
    int nCnt = 0;

    while(1)
    {
        Delay(4000000);
        nCnt++;

    }
}

and also there is no message : "remote processor 40800000.dsp is now up"

Maybe need to setting with system information on link.cmd file??

here is my link.cmd file :


-stack  0x1000                             /* SOFTWARE STACK SIZE           */
-heap   0x2000                             /* HEAP AREA SIZE                */

/* SPECIFY THE SYSTEM MEMORY MAP */

MEMORY
{
        RST_START:      org = 0x00800000  len = 0x0300
        IRAM_MEM:       org = 0x00800300  len = 0x7c00
        MMU_TLB:		ORIGIN = 0x4031C000  LENGTH = 0x000004000
		/*SBL will use 1 KB of space from address 0x80000000 for EVE */
        DDR3_A8:		org = 0x80000400 len = (0x0B000000 - 0x400)    /* 176 MB */
        DDR3_BOOT:      org = 0x8B000000 len = 0x00010000    /* 32 MB */
        DDR3_DSP:       org = 0x8B010000 len = 0x01FF0000    /* 32 MB */
        DDR3_M3VPSS:    org = 0x8D000000 len = 0x01000000    /* 16 MB */
        DDR3_M3VIDEO:   org = 0x8E000000 len = 0x01000000    /* 16 MB */
        DDR3_SR0:       org = 0x8F000000 len = 0x01000000    /* 16 MB */
}

/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */

SECTIONS
{
	boot :
	{
	 rts*.lib<boot*.obj>(.text)
	}load > DDR3_BOOT

	.cachetest_ddrbuf > IRAM_MEM
    GROUP: load > IRAM_MEM
    {
        .bss:       /* UNINITIALIZED OR ZERO INITIALIZED */
        .neardata:
        .rodata:
    }
    BOARD_IO_DELAY_DATA : load > IRAM_MEM
    BOARD_IO_DELAY_CODE : load > IRAM_MEM
    .csl_vect : load > RST_START
    .vects : load > IRAM_MEM
    .l2_int  : load > IRAM_MEM
    .pmIdleFunc : load > IRAM_MEM
    .init    : load > IRAM_MEM
    .cio     : load > IRAM_MEM

    .text 	 : load > IRAM_MEM              /* CODE                         */
    .data    : load > IRAM_MEM              /* INITIALIZED GLOBAL AND STATIC VARIABLES. */
                                            /* GLOBAL & STATIC VARIABLES.   */
                    RUN_START(bss_start)
                    RUN_END(bss_end)
    .const   : load > IRAM_MEM              /* GLOBAL CONSTANTS             */
    .cinit   : load > IRAM_MEM
    .stack   : load > IRAM_MEM            /* SOFTWARE SYSTEM STACK        */
	.far	 : load > IRAM_MEM
	.plt     : load > IRAM_MEM
	.fardata : load > IRAM_MEM
	.switch	 : load > IRAM_MEM
	.my_sect_ddr : load > IRAM_MEM
	.sysmem : load > IRAM_MEM
}

I think below is suspicious....

        DDR3_BOOT:      org = 0x8B000000 len = 0x00010000    /* 32 MB */

so I also tested with below, but result was same...(no message : remote processor 40800000.dsp is now up)

DDR3_BOOT:      org = 0x99000000 len = 0x04000000    /* 32 MB */

How can I calculate DDR3_BOOT org and len???

Please, check my dsp project :

am572x_dsp0_baremetal.zip

My setting of CMA and CMEM is as below :

am57xx-beagle-x15-common.dtsi

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>;	// 2GB
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ipu2_memory_region: ipu2-memory@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
		};

		dsp1_memory_region: dsp1-memory@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
		};

		ipu1_memory_region: ipu1-memory@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};

		dsp2_memory_region: dsp2-memory@9f000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9f000000 0x0 0x800000>;
			reusable;
			status = "okay";
		};
	};


am57xx-evm-cmem.dtsi
/ {
        reserved-memory {
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;

                cmem_block_mem_0: cmem_block_mem@a0000000 {
                        reg = <0x0 0xa0000000 0x0 0x0c000000>;
                        no-map;
                        status = "okay";
                };

		cmem_block_mem_1_ocmc3: cmem_block_mem@40500000 {
			reg = <0x0 0x40500000 0x0 0x100000>;
			no-map;
			status = "okay";
		};
        };

        cmem {
                compatible = "ti,cmem";
                #address-cells = <1>;
                #size-cells = <0>;

		#pool-size-cells = <2>;

                status = "okay";

                cmem_block_0: cmem_block@0 {
                        reg = <0>;
                        memory-region = <&cmem_block_mem_0>;
                        cmem-buf-pools = <1 0x0 0x0c000000>;
                };

		cmem_block_1: cmem_block@1 {
			reg = <1>;
			memory-region = <&cmem_block_mem_1_ocmc3>;
		};
        };
};

and memory status :

root@am57xx-evm:~# cat /proc/iomem
20013000-2fffffff : MEM
  20100000-201fffff : 0000:00:00.0
40300000-4037ffff : 40300000.ocmcram
40500000-405fffff : CMEM
40800000-40847fff : l2ram
40d01000-40d010ff : mmu@40d01000
40d02000-40d020ff : mmu@40d02000
40e00000-40e07fff : l1pram
40f00000-40f07fff : l1dram
41000000-41047fff : l2ram
41501000-415010ff : mmu@41501000
41502000-415020ff : mmu@41502000
41600000-41607fff : l1pram
41700000-41707fff : l1dram
43300000-433fffff : edma3_cc
44000000-44ffffff : ocp
45000000-45000fff : ocp
48020000-4802001f : serial
48032000-4803207f : timer@48032000
48034000-4803407f : timer@48034000
48036000-4803607f : timer@48036000
4803e000-4803e07f : timer@4803e000
48051000-480511ff : gpio@48051000
48053000-480531ff : gpio@48053000
48055000-480551ff : gpio@48055000
48057000-480571ff : gpio@48057000
48059000-480591ff : gpio@48059000
4805b000-4805b1ff : gpio@4805b000
4805d000-4805d1ff : gpio@4805d000
48060000-480600ff : i2c@48060000
48070000-480700ff : i2c@48070000
4807c000-4807c0ff : i2c@4807c000
48086000-4808607f : timer@48086000
48088000-4808807f : timer@48088000
48090000-48091fff : rng@48090000
4809c000-4809c3ff : mmc@4809c000
480a5000-480a509f : des@480a5000
480ad000-480ad3ff : mmc@480ad000
480b4000-480b43ff : mmc@480b4000
48422000-4842201f : serial
48440200-4844027f : pwm@48440200
4844a000-4844ad1b : padconf@4844a000
48484000-48484fff : ethernet@48484000
48485000-484850ff : mdio@48485000
48485200-48487fff : ethernet@48484000
48820000-4882007f : timer@48820000
48822000-4882207f : timer@48822000
48824000-4882407f : timer@48824000
48826000-4882607f : timer@48826000
48828000-4882807f : timer@48828000
4882a000-4882a07f : timer@4882a000
4882c000-4882c07f : timer@4882c000
4882e000-4882e07f : timer@4882e000
48838000-488380ff : rtc@48838000
48840000-488401ff : mailbox@48840000
48842000-488421ff : mailbox@48842000
48880000-4888ffff : omap_dwc3_1@48880000
48890000-48897fff : usb@48890000
  48890000-48897fff : usb@48890000
4889c100-488a6fff : usb@48890000
488c0000-488cffff : omap_dwc3_2@488c0000
488dc100-488e6fff : usb@488d0000
4a0021e0-4a0021eb : bandgap@4a0021e0
4a00232c-4a002337 : bandgap@4a0021e0
4a002380-4a0023ab : bandgap@4a0021e0
4a0023c0-4a0023fb : bandgap@4a0021e0
4a00246c-4a00246f : ldo-address
4a002470-4a002473 : ldo-address
4a002554-4a002557 : gmii-sel
4a002564-4a00256b : bandgap@4a0021e0
4a002574-4a0025c3 : bandgap@4a0021e0
4a002b78-4a002c73 : dma-router@b78
4a002c78-4a002cf3 : dma-router@c78
4a003400-4a003867 : pinctrl-single
4a056000-4a056fff : mpu
  4a056000-4a056fff : dma-controller@4a056000
4a080000-4a08001f : ocp2scp@4a080000
4a084000-4a0843ff : phy@4a084000
4a084400-4a08447f : phy_rx
4a084800-4a084863 : phy_tx
4a084c00-4a084c3f : pll_ctrl
4a085000-4a0853ff : phy@4a085000
4a090000-4a09001f : ocp2scp@4a090000
4a094000-4a09407f : phy_rx
4a094400-4a094463 : phy_tx
4a096000-4a09607f : phy_rx
4a096400-4a096463 : phy_tx
4a096800-4a09683f : pll_ctrl
4ae07ddc-4ae07ddf : setup-address
4ae07de0-4ae07de3 : control-address
4ae07de4-4ae07de7 : setup-address
4ae07de8-4ae07deb : control-address
4ae07e20-4ae07e23 : control-address
4ae07e24-4ae07e27 : control-address
4ae07e30-4ae07e33 : setup-address
4ae07e34-4ae07e37 : setup-address
4ae0c154-4ae0c157 : ldo-address
4ae0c158-4ae0c15b : ldo-address
4ae10000-4ae101ff : gpio@4ae10000
4ae14000-4ae1407f : wdt@4ae14000
4ae20000-4ae2007f : timer@4ae20000
4b101000-4b1012ff : sham@53100000
4b220000-4b221fff : interrupt-controller@4b220000
4b222000-4b2223ff : control
4b222400-4b2224ff : debug
4b224000-4b2243ff : control
4b224400-4b2244ff : debug
4b234000-4b236fff : iram
4b238000-4b23afff : iram
4b2a0000-4b2a1fff : interrupt-controller@4b2a0000
4b2a2000-4b2a23ff : control
4b2a2400-4b2a24ff : debug
4b2a4000-4b2a43ff : control
4b2a4400-4b2a44ff : debug
4b2b4000-4b2b6fff : iram
4b2b8000-4b2bafff : iram
4b500000-4b50009f : aes@4b500000
4b700000-4b70009f : aes@4b700000
51000000-51001fff : rc_dbics
51002000-5100214b : ti_conf
55020000-5502ffff : l2ram
55082000-550820ff : mmu@55082000
58000000-5800007f : dss
58001000-58001fff : dispc@58001000
58004054-58004057 : pll1_clkctrl
58004300-5800431f : pll1
58009054-58009057 : pll2_clkctrl
58009300-5800931f : pll2
58040000-580401ff : wp
58040200-5804027f : pll
58040300-5804037f : phy
58060000-58078fff : core
58820000-5882ffff : l2ram
58882000-588820ff : mmu@58882000
80000000-9fcfffff : System RAM
  80008000-80dfffff : Kernel code
  81000000-8109459f : Kernel data
a0000000-abffffff : CMEM


root@am57xx-evm:~# cat /proc/cmem

Block 0: Pool 0: 1 bufs size 0xc000000 (0xc000000 requested)

Pool 0 busy bufs:
id 0: phys addr 0xa0000000 (cached)

Pool 0 free bufs:

How can I debugging on this situation?

Could you give me some solution of this issue??

Thank you.

  • DSP DDR3_BOOT address should be 0x99000000.

    Could you move all sections to DDR3_BOOT, instead of IRAM, and try again?

  • Thank you, Mr. Liu.

    I changed my .cmd file as below :

    -stack  0x1000                             /* SOFTWARE STACK SIZE           */
    -heap   0x2000                             /* HEAP AREA SIZE                */
    
    /* SPECIFY THE SYSTEM MEMORY MAP */
    
    MEMORY
    {
            RST_START:      org = 0x00800000  len = 0x0300
            //IRAM_MEM:       org = 0x00800300  len = 0x7c00
    		IRAM_MEM:       org = 0x40500000  len = 0x7c00
            MMU_TLB:		ORIGIN = 0x4031C000  LENGTH = 0x000004000
    		/*SBL will use 1 KB of space from address 0x80000000 for EVE */
            DDR3_A8:		org = 0x80000400 len = (0x0B000000 - 0x400)    /* 176 MB */
    
            //DDR3_BOOT:      org = 0x8B000000 len = 0x00010000    /* 32 MB */
            //DDR3_DSP:       org = 0x8B010000 len = 0x01FF0000    /* 32 MB */
            //DDR3_M3VPSS:    org = 0x8D000000 len = 0x01000000    /* 16 MB */
            //DDR3_M3VIDEO:   org = 0x8E000000 len = 0x01000000    /* 16 MB */
            //DDR3_SR0:       org = 0x8F000000 len = 0x01000000    /* 16 MB */
    
            DDR3_BOOT:      org = 0x99000000 len = 0x04000000    /* 32 MB */
    }
    
    /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
    
    SECTIONS
    {
    	boot :
    	{
    	 rts*.lib<boot*.obj>(.text)
    	}load > DDR3_BOOT
    
    	.cachetest_ddrbuf > DDR3_BOOT
        GROUP: load > DDR3_BOOT
        {
            .bss:       /* UNINITIALIZED OR ZERO INITIALIZED */
            .neardata:
            .rodata:
        }
        BOARD_IO_DELAY_DATA : load > DDR3_BOOT
        BOARD_IO_DELAY_CODE : load > DDR3_BOOT
        .csl_vect : load > DDR3_BOOT
        .vects : load > DDR3_BOOT
        .l2_int  : load > DDR3_BOOT
        .pmIdleFunc : load > DDR3_BOOT
        .init    : load > DDR3_BOOT
        .cio     : load > DDR3_BOOT
    
        .text 	 : load > DDR3_BOOT              /* CODE                         */
        .data    : load > DDR3_BOOT              /* INITIALIZED GLOBAL AND STATIC VARIABLES. */
                                                /* GLOBAL & STATIC VARIABLES.   */
                        RUN_START(bss_start)
                        RUN_END(bss_end)
        .const   : load > DDR3_BOOT              /* GLOBAL CONSTANTS             */
        .cinit   : load > DDR3_BOOT
        .stack   : load > DDR3_BOOT            /* SOFTWARE SYSTEM STACK        */
    	.far	 : load > DDR3_BOOT
    	.plt     : load > DDR3_BOOT
    	.fardata : load > DDR3_BOOT
    	.switch	 : load > DDR3_BOOT
    	.my_sect_ddr : load > DDR3_BOOT
    	.sysmem : load > DDR3_BOOT
    }
    
    

    but the result is same as before...

  • Hi,

    The RTOS example binary is not a good reference to use with Linux.

    I recommend you to take a look at the below link and use IPC example as your reference.

    https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/Foundational_Components_IPC.html

    Regards,
    Stanley