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TMS320C6748 interrupt pin question

Other Parts Discussed in Thread: TMS320C6748

I have one refresh project that changes the TI DSP from TMS320VC5420 to TMS320C6748.

1. In 5420, there is a BIO pin. Does 6748 come with a pin with similar pin feature?

2. In 6748 the application notes SPRUFE8, says that it has external interrupt INT4 to INT15, but where are those pins? I cannot find the corresponding pin assignment in the datasheet.

  • Tony Lim said:

    1. In 5420, there is a BIO pin. Does 6748 come with a pin with similar pin feature?

    There is no equivalent Branch Control input pin for the C6748 (or any other C6000 based DSP design).  Many of the instructions of the C6000 have conditional execution capability, but the C6000 also does not support the Execute Conditionally (XC) capability.

     

    Tony Lim said:

    2. In 6748 the application notes SPRUFE8, says that it has external interrupt INT4 to INT15, but where are those pins? I cannot find the corresponding pin assignment in the datasheet.

    The SPRUFE8 is a Reference Guide for the C674x DSP subsystem inside the device of C6748.  The INT4-INT15 mentioned are interrupts going into the DSP subsystem and may have some allocated to internal peripherals.  You need to reference the TMS320C6748 datasheet to specifically identify how these interrupts of the DSP are mapped to pins, peripherals, etc.  Section 5.1.1. of SPRUFE8 indicates that you need to refer to the device-specific datasheet for details.

     

  •  

    SPRS590B TMS320C6748 Fixed/Floating Point Digital Signal Processor (Rev. B) explains how the events are mapped to each interrupts(refer figure 7-8 and table 6-6)

    Interrupt Mux Registers (INTMUXn)

    The interrupt selector contains interrupt mux registers that allow you to program the source for each of the 12 available CPU interrupts.

    Example: Let say INT4 should be mapped to LCD Event.

     

    EVT #73 is (LCDC_INT) LCD Controller Interrupt;

    You need to map this value to INTMUX1.INTSEL4, as INTMUX1[6:0] mapped to INTSEL4.

     

    You have to set INTMUX1.INTSEL4 = 73 so that when LCD interrupt is triggered, it will send interrupt through CPU INT4.

     

      /* map LCDC_INT event to cpu int4       */

      CSL_FINS(intcRegs->INTMUX1, DSPINTC_INTMUX1_INTSEL4, 73);