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Configuring CS3 of OMAP3530 GPMC to Memory map a 8bit Non-Multiplexed ASIC device in Windows CE.

Other Parts Discussed in Thread: OMAP3530

Hi,

I am trying to interface an 8bit Non-Multiplexed ASIC device to OMAP3530.

I am Using Variscite OMAP35xx based Single-Board-Computer(VAR-OM35xxSBC), Windows CE 6.0 is my OS and Variscite provided BSP.

I am able to map the device and able to write to the location, but CS3 pin is not toggling.

Can anybody tell me any further configuration has to be done or anything is wrong in my configuration?

My configurations are as given below.

Pad configuration for CS3 pin. This code is from Platform.c

...............

........................

OMAP_SYSC_PADCONFS_WKUP_REGS *pWakeupConfig = OALPAtoUA(OMAP_SYSC_PADCONFS_WKUP_REGS_PA);

OUTREG16(&pConfig->CONTROL_PADCONF_GPMC_nCS3, (INPUT_DISABLE | PULL_UP | MUX_MODE_0));      /*GPMC_nCS3*/

............................

.................

 

GPMC cs3 configurations macros in bsp_cfg.h

#define BSP_GPMC_PSOC_CONFIG1        0x00001000         // no wait, 8 bit, non multiplexed
#define BSP_GPMC_PSOC_CONFIG2        0x00080800         // CS OffTime 48ns
#define BSP_GPMC_PSOC_CONFIG3        0x00020201         // we don't use ADV
#define BSP_GPMC_PSOC_CONFIG4        0x08000800         // Deassert #WE, #OE at 48ns
#define BSP_GPMC_PSOC_CONFIG5        0x01060D0D         // Cycle time 78ns, access time 36ns
#define BSP_GPMC_PSOC_CONFIG6        0x00000F80         // Delay 90ns between successive accesses to meet minimum cycle time
#define BSP_GPMC_PSOC_CONFIG7        0x00000F56         // Base address 0x16000000, 16MB window
#define BSP_GPMC_PSOC_CONFIG7_1    0x00000F16         // Base address 0x16000000, 16MB window   

 

Configuration done in 'init' function of the driver

       PHYSICAL_ADDRESS pa;

       OMAP_GPMC_REGS   pGpmc;

        pa.QuadPart = OMAP_GPMC_REGS_PA;  // OMAP_GPMC_REGS_PA is defined as 0x6E000000
        pGpmc = MmMapIoSpace(pa, sizeof(OMAP_GPMC_REGS), FALSE);

        OUTREG32(&pGpmc->GPMC_CONFIG7_3, BSP_GPMC_PSOC_CONFIG7_1); // disabling the chip select
       
        OUTREG32(&pGpmc->GPMC_CONFIG, (INREG32(&pGpmc->GPMC_CONFIG))|0x00000002); //setting LIMITEDADDRESS to 1.
       
        OUTREG32(&pGpmc->GPMC_CONFIG1_3, BSP_GPMC_PSOC_CONFIG1);
        OUTREG32(&pGpmc->GPMC_CONFIG2_3, BSP_GPMC_PSOC_CONFIG2);
        OUTREG32(&pGpmc->GPMC_CONFIG3_3, BSP_GPMC_PSOC_CONFIG3);
        OUTREG32(&pGpmc->GPMC_CONFIG4_3, BSP_GPMC_PSOC_CONFIG4);
        OUTREG32(&pGpmc->GPMC_CONFIG5_3, BSP_GPMC_PSOC_CONFIG5);
        OUTREG32(&pGpmc->GPMC_CONFIG6_3, BSP_GPMC_PSOC_CONFIG6);
        OUTREG32(&pGpmc->GPMC_CONFIG7_3, BSP_GPMC_PSOC_CONFIG7);