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Original question:

PROCESSOR-SDK-AM65X: A15/53 (Linux) and M4/R5 (Baremetal)

PROCESSOR-SDK-AM65X: manage A53 and R5 resources

rei
Mastermind 6155 points
Part Number: PROCESSOR-SDK-AM65X
Other Parts Discussed in Thread: AM6548, SYSBIOS

Hi,

My customers want to use AM6548. They want to run Linux on Cortex-A53.

They also want real-time control such as motor control. Linux is not suitable for real-time control, so they would like to use Cotex-R5 for motor control.

Question 1:
I could only find "Hello world" of Cortex-R5's sample code . Are there any sample codes that use peripheral such as GPIO and ADC?

Question 2:
I can't understand how to manage A53 and R5 resources. How can we manage resources?
For example, if I want to use GPIO from R5, interrupt to A53? Is the opposite the same?
(Because the R5 domain is divided, it is confusing how to manage between cores.)

Regards, Rei

  • 0
    TI__Guru* 77694 points

    Hi Rie,

    rei said:
    Question 1:
    I could only find "Hello world" of Cortex-R5's sample code . Are there any sample codes that use peripheral such as GPIO and ADC?

    There are examples for GPIO at <pdk>/packages/ti/drv/gpio/test/led_blink and for ADC at <pdk>/packages/ti/csl/example/adc/adc_singleshot_test_app

    rei said:
    Question 2:
    I can't understand how to manage A53 and R5 resources. How can we manage resources?
    For example, if I want to use GPIO from R5, interrupt to A53? Is the opposite the same?

    I will ask an expert on this to answer.

    Regards,

    Karan

  • 0 in reply to Karan Saxena
    Mastermind 6155 points

    Hi Karan,

    Thank you very much.

    I couldn't confirm the latest AM65x RTOS SDK because pdkProjectCreate can't be done.(There is not R5 argument setting)

    My environment may be bad, so I'll check it later.

     

    >>>I will ask an expert on this to answer.

    Thank you, I would appreciate it if you could tell me about resource management.

    Regards, Rei

  • 0 in reply to rei
    TI__Guru* 77694 points

    Hi Rei,

    On am65xx devices the the Resource management is central and happens by passing a board configuration to DMSC (running on M3 core). You can enforce resource partitioning using this board configuration.

    Please refer the TISCI user guide for these details: https://software-dl.ti.com/tisci/esd/latest/1_intro/TISCI.html#centralized-device-management

    Regards,

    Karan

  • 0 in reply to Karan Saxena
    Mastermind 6155 points

    Hi Karan,

    Thank you for your reply. I will also study the role of DMSC (TISCI).

    Customers have another questions.

    They have another consideration, they also want to consider the following configuration.
    Cortex-A53... Baremetal
    Cortex-R5...TI-RTOS

    Question 1:
    Are there baremetal sample codes for A53?

    Question 2:
    When operating with TI-RTOS on Cortex-R5,
    Do R5 only use MCU_MSRAM and CPU cache?
    Can R5 also access DDR?

    I'm sorry for all of the questions. Thank you for your patience.

    Regards,
    Rei

  • 0 in reply to rei
    TI__Guru* 77694 points

    Hi Rei,

    rei said:

    Question 1:
    Are there baremetal sample codes for A53?

    We generally run an HLOS (high level OS) on the Cortex A core, what is the use-case for a baremetal application? Can you elaboreate?

    rei said:
    Question 2:
    When operating with TI-RTOS on Cortex-R5,
    Do R5 only use MCU_MSRAM and CPU cache?
    Can R5 also access DDR?

    Yes DDR can also be accessed by the R5 core.

    Regards,

    Karan

  • 0 in reply to Karan Saxena
    Mastermind 6155 points

    Hi Karan,


    Thank you for your reply. 

    We generally run an HLOS (high level OS) on the Cortex A core, what is the use-case for a baremetal application? Can you elaboreate?

    Customers are looking for the following baremetal libraries on A53.
    -Ethernet (stack)
    -USB
    -PCIe

    Regards,
    Rei

  • 0 in reply to rei
    Mastermind 6155 points

    Hi Karan,

    Customers want baremetal sample code because they want to run their own OS on Cortex-A53. Is there any information regarding this matter?

    Thank you as always.

    Regards,

    Rei

  • 0 in reply to rei
    TI__Genius 14680 points

    Rei,

    The Processor SDK RTOS supports baremetal and SYSBIOS.

    Please refer to the sub-folders under <pdk>\packages\ti\drv\

    There are examples in the respective driver folders.

    Best regards,

    Dave