TDA4VM: TDA4VM how to test PCIe interface hardware SI eye pattern?

Tao Han

Part Number: TDA4VM

Hi Experts:

Customer want to test their PCB PCIe interface SI performance.

Can you share with use the test command or test GEL file for PCIe TX/RX mode? Because customer 2 * TDA4x connect through PCIe interface.

They need test SI and eye pattern of EP/RC mode. Has check Linux PCIe software driver, looks like all used for PCIe read/write test.

Has try to use CCS setting PCIe1 configure register 0x0291 7008 and 0x0d80 00f0, The board do not send out any test pattern for it.

(https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/latest/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/PCIe/PCIe_End_Point.html)

Best Regards!

over 6 years ago

0 jian35385 over 5 years ago

TI__Mastermind 23125 points

Tao,

you are right that PCIe examples are for data read and write.

Let me check with our internal teams to see if there is a set of register sequence to generate test pattern. In the test you tried, the HOT RESET need to issued by the RC. But there may be additional PHY controls need to be set before that. so let me check first.

jian

0 jian35385 over 5 years ago in reply to jian35385

TI__Mastermind 23125 points

Tao,

Sorry for the long delay. on the compliance, there was a similar thread at:

https://e2e.ti.com/support/processors/f/791/p/933338/3449405#3449405

It is still not documented, but you can try:

"You can use the EC bit in the RC to force the EP to enter compliance mode, the EC bit is the PCIE_CORE_RP_I_LINK_CTRL_STATUS_2[4] register bit. "

Let me know of this helps.
Jian

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TDA4VM: TDA4VM how to test PCIe interface hardware SI eye pattern?