Compiler/DRA829V: DRA829V

Cibichakkaravarthi R

Part Number: DRA829V
Other Parts Discussed in Thread: DRA829

Tool/software: TI C/C++ Compiler

Hello,

We are working on on-chip power management of DRA829 using PMLIB of psdk_rtos_auto_j7_06_02_00_21

In datasheet it is mentioned that the device power states are defined based on the combination of voltage domain(VD) and power domain(PD) on/off states. We are currently implementing ACTIVE to CPD-OFF state

in CPD-OFF state main SoC side all power domains are off and In reference manual Table 5-1906 states that some Power domain states are not software controlled. how the state transition should be implemented

in software.

Regards,

Cibi

over 5 years ago

0 Karan Saxena over 5 years ago

TI__Guru* 78145 points

Hi Cibi,

Let me get some details on this and get back to you.

Regards,

Karan

0 Kevin Lavery over 5 years ago

TI__Mastermind 22170 points

Cibi,

Is this a software question or a datasheet question? I cannot quite tell...

Kevin

0 Cibichakkaravarthi R over 5 years ago in reply to Kevin Lavery

Prodigy 145 points

I am asking from software perspective.

Regards,

Cibi

0 Vineet Roy over 5 years ago in reply to Cibichakkaravarthi R

TI__Mastermind 37435 points

Hi,

Here's the response I got from expert...

The first this to get towards the CPD Off is to ensure the modules in the domain are turned off. This can start with sending messages to the SYSFW which turns off the modules one by one. When the off command for all modules corresponding to a particular LPSC or PD are received the SYSFW automatically will turn off the domain.

The CPUs in the domain should go to WFI and then ensure no pending interrupts are present before they can be turned off.

Regards

Vineet

0 Cibichakkaravarthi R over 5 years ago in reply to Vineet Roy

Prodigy 145 points

Hi,

In order to move to ACTIVE to CPD-OFF state, Table 5-1926 and 5-1924 says some sequence of operations(ACT-x) to be followed which includes
storing the context of cores in the main domain to DDR and Idling the cores.

From the "Responsible HW/SW" column in the Table 5-1924 we could see softwares from multiple cores(C71X,C66x,A72,R5x) are involved
in executing the sequence of ACT-x mentioned in Table 5-1924.

Do we have support in PowerManagement module to perform the ACT-x(Table 5-1924) for CPD-OFF state in the respective cores?

Is it possible to make the power state transition(to CPD-OFF) only using R5F core in the MCU domain and SYSFW?

Regards,
Cibi

0 Vineet Roy over 5 years ago in reply to Cibichakkaravarthi R

TI__Mastermind 37435 points

Let me check and get back

Regards

Vineet

0 Vineet Roy over 5 years ago in reply to Vineet Roy

TI__Mastermind 37435 points

Hi,

Please take a look at

http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/pm/devices.html#pm-devices-msg-set-device

select auto_off and transition will take place if the handshake between LPSC and IP occurs. R5F core for example, will transition ONLY if the R5F core is in WFI - other processors have similar constraints as well. the processor states are visible (if exposed by hardware), via the processor status APIs

http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/security/PROC_BOOT.html#proc-boot-get-processor-status

Regards

Vineet

Processors

Processors forum

Compiler/DRA829V: DRA829V