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VDDMX1 for the DM365 - can I tie it to VDDA18_PLL?

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I am sort of boxed into a layout issue.  I made a mistake and somehow, I know it sounds dumb now (and it was, and will be forever), I didn’t wire up VDDMX1 so the crystal has no power and of course it’s not wiggling.  Due to the layout I would have an extremely difficult time placing any more decoupling capacitors or ferrite filters.  But it turns out that VDDA18_PLL is very close and I think I can get it over to VDDMX1.  So the question is can I tie VDDMX1 to VDDA18_PLL?  I could also probably get it to the 1.8V for the IO as well.  Which is better?

 

Thank you,

 

-David

  • From your description it sounds like you have already built a board, which didn't work because of this issue, and now you're looking to see how you will do your next board, is this correct?

    I understand your position.  We've all made mistakes like these.  There are so many things to remember, sometimes we forget the simple things while paying attention to the complex ones!

    The oscillator is important, as you know, but one saving grace here is that it doesn't take much power.  It won't put a lot of noise on the power supply, especially because it's an analog circuit that oscillates to form a sine wave, which is much quieter than a square wave.

    I would feel pretty good about putting it on a PLL supply.  I would avoid the IO supply since this has a lot of noise on it, and could cause intermittent problems based on the IO activity, especially since you can't fit a filter in there.  The PLL supply is already filtered, and should be quiet, and this circuit won't add a lot of noise. 

    It would be better if you could add a cap there near the oscillator supply pin, but if you can't, it should still work.  If you can blue wire it with the board you have, you might be able to check the operation.  When you implement this (on your current board or the new board), check the noise it causes on the power for the PLLs.  It's probably not going to be much, and the nice thing is that it'll be a multiple of the PLL frequency unless the PLL source comes from another clock, so if the phases line up right, this may work in your favor.

    In the future, I'd recommend checking out our Schematic Check list Wiki.  We've got one specifically for some chips like the DM365, but we also have a general one that lists all the critical things to check.  Of them, the big three are Clocks (which includes oscillators), Reset, and JTAG.  These three need to be right, or the board will be useless.

    These checklists can help you go down a simple list of things to check before you finalize the design and send it out for production.  It's the same list we use when we review schematics, and we try to add to it if we find a specific thing to watch out for on certain chips.

    The Wiki can be found at http://processors.wiki.ti.com/index.php/Category:Schematic_Checklists

    The general one is listed as "Hardware Design Checklist".

    I hope this helped.  Good luck on your next design!

    Keven

     

  • Keven,

    Yes, you got it just right.  That analysis of the PLL source matches up with what I was hoping, so I'm glad to hear you say that.  I should be able to put a small cap right near the supply line for the oscillator, so that will help a little as well.  I think I'm stuck having to go that route, at least for now anyway.

    I did review that checklist, but obviously didn't do a great job of it.  That list is helpful though and I'll go through it again.  THanks for your feedback.  I'll consider this closed at this point and hope for a better outcome on the next board spin!

    Regards,

    -David