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EDMA linking, chaining, and Null parameters set

Hi,

I'd like to ask gurus for clarification. As per SPRU234C

All enabled EDMA channel parameter sets must enable linking for proper
operation. The parameter should either link to another useful transfer or to
NULL.

It means that whenever I use EDMA, I have to set LINK bit as 1 in OPT field of configuration, right? No LINK = 0 allowed, except as NUUL parameters set? And now lets say, I have two tranfers, one of which triggers another via chaining mechanism. In this case both transfers still must use linking to NULL parameters set, right? Do I understand correctly, that during reload of NULL parameters set all parameters in target just wiped to zero, so next time I have to configure all 6 words of parameters. I'm asking this because I was planning to configure several transfer with static values and then just trigger them with EDMA_setChannel() repeatedly.

Thanks in advance.

  • rrlagic said:
    It means that whenever I use EDMA, I have to set LINK bit as 1 in OPT field of configuration, right?

    There is no LINK bit in the OPT field.  Perhaps you're referring to the STATIC bit which would need to be 0 in order for linking to occur.

    rrlagic said:
    And now lets say, I have two tranfers, one of which triggers another via chaining mechanism. In this case both transfers still must use linking to NULL parameters set, right?

    There's no reason why you would need to link to NULL parameter sets.  It would be more efficient to link to a parameter set containing the values for your next transfer on that channel.  If you're doing the exact same transfer over and over you might link to a parameter set that is a copy of your original parameters.

  • Brad,

    Thanks for the hints. Still I'd like to ask for more clarification.

    Perhaps, we are talking about different architectures. STATIC bit is present in EDMA3. Mine is C6414/6416 with just EDMA, so OPT field does have LINK field as bit #1.

    So let's get back to my situation. I have to serve FPGA with new data for every OFDM symbol. Data reside in the contiguous buffer of length equal to used carriers count, e.g.1200. FFT input buffer in FPGA is 2048 and I have to put former half of DSP's data buffer at the end of FPGA's buffer, whilst latter half goes to origin of FPGA's buffer. Also there are zeros on unused carriers.  Something like this:

         /*               cnt                                */
        /*         |<------------->|                        */
        /*          _______ _______                         */
        /*         |XX_R_XX|XX_L_XX|            DSP buffer  */
        /*      _______|_______/                            */
        /*     |       \_____________                       */
        /*  ___|___________ _________\_____                 */
        /* |XX_L_XX|___0___|___0___|XX_R_XX|    FPGA buffer */
        /*                                                  */


    So I configure two channels. One channel supplies right side data. This channel triggered by DSP on signal from FPGA. When done, it triggers another channel, which sends left side data. I have to repeat this process many times. Configuration parameters for EDMA are all the same every time. I've tried to configure EDMA parameters set with linking disabled (LINK=0 in OPT). But recently I found mentioned note in SPRU234C:

    All enabled EDMA channel parameter sets must enable linking for proper
    operation. The parameter should either link to another useful transfer or to
    NULL. Refer to section 1.12.

    This note confuses me. How should I understand that note? Is it ever possible to use channel configured with LINK=0?

    And one more question. As I mentioned, transfer configuration is fixed for certain operation mode. So is it OK if I update just element count field in PaRAM and then trigger new transfer? Or perhaps you might advise better scheme.

    Thanks in advance.

  • Ok, well that explains it.  I (incorrectly) assumed you were using EDMA3.  It's a different story on c6416...

    rrlagic said:
    This note confuses me. How should I understand that note? Is it ever possible to use channel configured with LINK=0?

    I agree it's a bit confusing.  And now the "old" EDMA is a bit foggy for me.  I see on page 163 there is an example that sets LINK=0.  I'd recommend setting LINK=1 "just in case" for right now.  Maybe someone else will have some more details, but I'm not certain and would play it safe.

    rrlagic said:
    And one more question. As I mentioned, transfer configuration is fixed for certain operation mode. So is it OK if I update just element count field in PaRAM and then trigger new transfer? Or perhaps you might advise better scheme.

    There's a note on page 23 that says:

    "Parameter set entries should always be accessed as 32-bit words using the STW or LDW instructions."

    That said, you would need to either do a write of both the element count and frame count simultaneously, or else make it a read-modify-write in order to meet this requirement.

    What you're doing sounds like it might be a good candidate for QDMA.  In the QDMA you're actually not allowed to link which would remove your other question/issue.  You can also set it up such that when you write a certain word that kicks off the transfer.

    FYI, I'm gong on vacation so don't expect any more replies from me on this issue any time soon!

  • Well, to close the thread properly I have to report, that we are using EDMA without linking to NULL parameters set for a while ant it seems to operate as expected.