AM6548: TI RTOS Questions

Lawrence Wong

Genius 16030 points

Part Number: AM6548

Customer using PSDK RTOS v6.03 and have the following questions:

Sample Project for PCIe. Looked at \packages\ti\drv\pcie\example but nothing could be imported by CCS10.10
Looking for PSDK PCIe latency and throughput numbers
Looking for EtherCAT Latency and throughput numbers

over 5 years ago

0 Dave Bell over 5 years ago

TI__Genius 14680 points

Lawrence,

1) There is not a CCS project, but you can load and run the PCIe examples from the folder you referenced. Just build through command line and you can load the binary into CCS.

2) The QoS application will let you measure latencies across PCIe for a 2-EVM setup. It could be modified for loopack with single EVM but currently set for two. See http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_device_drv.html#id14

3) EtherCAT latencies are in the datasheet at <install_dir>\PRU-ICSS-EtherCAT_Slave_01.00.08.01\docs

Best regards,

Dave

0 Lawrence Wong over 5 years ago in reply to Dave Bell

TI__Genius 16030 points

tried using “make pcie”, I get the following error:

'make' is not recognized as an internal or external command, operable program or batch file.

I suspect there is an environment variable or a path I need to add so that this command can be found. Can you advise?

0 Dave Bell over 5 years ago in reply to Lawrence Wong

TI__Genius 14680 points

Lawrence,

Please see details in the getting started guide... you'll need to use "gmake" on Windows.

SDK 6.3: http://software-dl.ti.com/processor-sdk-rtos/esd/docs/latest/rtos/index_overview.html#processor-sdk-rtos-getting-started-guide

SDK 7.0: https://software-dl.ti.com/processor-sdk-rtos/esd/AM65X/latest/exports/docs/pdk_jacinto_07_00_00/docs/userguide/getting_started.html#getting-started

If you want to build just the PCIe QoS example, you can go to that directory...

<pdk_install_dir>\packages\ti\drv\pcie\example\Qos>gmake SOC="am65xx"

Best regards,

Dave

0 Lawrence Wong over 5 years ago in reply to Dave Bell

TI__Genius 16030 points

Thanks. In regards to EtherCAT performance, any insights as to how this performance data might change when ICSS-G is fully leveraged, instead of ICSS-M?

0 Dave Bell over 5 years ago in reply to Lawrence Wong

TI__Genius 14680 points

Lawrence,

There should not be a difference for the firmware as for EtherCAT slave only the main PRUs are used within the PRU-ICSSG, which very common to PRU-ICSS. You can see the internal latencies are very similar in https://www.ti.com/lit/pdf/sprace8

There will be differences a the SoC level for latencies to internal and off-chip RAM, particularly if sharing data to an external host over GPMC or PCIe, but this is not comprehended in the EtherCAT datasheet and will be managed at the application level.

Best regards,

Dave

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AM6548: TI RTOS Questions