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PCB impedance for DDR2, Zo?

Judson Wilson
Intellectual 620 points
Other Parts Discussed in Thread: OMAP-L138

Hello, I am working on a OMAP-L138 based design.

In the datasheet, page 133  Table 6-29. PCB Stack Up Specifications, the authors list the "Single Ended Impedance, Zo  50-75 ohms".

What specifically does this mean?  Should I be designing my PCB stackup such that all traces are 50-75 ohms single ended? Or is this referring to something else specifically?

 My initial calculations are showing I would need 4 mil thickness FR4 if using 4 mil traces in a stripline trace.  This seems thin to me, but I do not have much experience in this.

Thanks

  • 0
    Intellectual 620 points

    Also, the next item in the table is "Impedance Control -  +/-5 ohm", I assume this means that all my traces need to fall within a 10ohm total range?

    I assume that using simple calculator estimates for the stack-up is sufficient, since the "Understanding TI’s PCB Routing Rule-Based DDR Timing
    Specification"  says "The system designer does not have to run simulations nor have access to simulation tools." in the summary?

    I feel like I am being paranoid about this stuff.

  • 0 in reply to Judson Wilson
    TI__Mastermind 27585 points

    Yes that is correct, the single ended impedance should be from 50-75 Ohms, but all traces need to be within +-5 Ohms of each other.

    You should be able to give that information to the PCB manufacturer as part of your board spec and they should be able to take care of it.

    Jeff