AM3517 & OMAP3530 SMI instruction

Other Parts Discussed in Thread: AM3517, OMAP3530Hi experts: My L2 cache code works fine on omap3530 processor, but it fails on am3517 processor, by the way i do not use Uboot to boot my image. I read the Uboot code and find Uboot use the following code to invalidate the L2 cache: moveq r12, #0x1 @ set up to invalide L2 smi: .word 0x01600070 @ Call SMI monitor (smieq) I use this code in my bootloader then the L2 cache code works. I find this in the am3517's manual 24.4.1 : To use the level 2 (L2) cache with the device, the ROM code provides three primitive services. These services are implemented in monitor mode and do not use any resources outside the MPU subsystem. The services are described below. To call a service, a register r12 must be set to service ID and the SMI instruction must be executed. • r12=1: To use the L2 cache, all L2 line data must be invalidated through the CP15 registers. This service invalidates the entire L2 cache and must be performed after a POR or a loss of L2 cache after reset. This register can also be read. This explain also appears in omap3530's manual 25.4.1, but i did not use SMI call on omap330 and the L2 cache code works fine on omap3530. Does anyone get the same situation? What is the difference between the two processor's ROM code ? How could i get the ROM code ? Thanks !