AM5716: UHS-I SDR104, 4-bit data, half-cycle Specs.

Hitoshi Sugawara

Part Number: AM5716

Hi Experts,

I have a question about "Figure 7-70. MMC/SD/SDIO in - High Speed SDR104 - Receiver Mode" in the datasheet SPRS957I on page 313.

There are no description of the timings for SDR1043, SDR1044, SDR1047 and SDR1048.
Could you please let me know the specs for them?

Thank you and best regards,
Hitoshi

over 6 years ago

0 Shiou Mei Huang over 6 years ago

TI__Genius 10180 points

Hitoshi-san,

SDR104 mode uses DLL tuning to find the optimal CLK-to-input DAT skew in real time and meet the setup/hold time requirement. As a result the input timing is not published. More information can be found in TRM and corresponding application note.

Best Regards,

Shiou Mei

0 Hitoshi Sugawara over 6 years ago in reply to Shiou Mei Huang

TI__Mastermind 21130 points

Hi Shiiou,

Thank you so much for your quick response.
I have dispatched the information to a customer.

If there is a further question, will post anther thread.
Best regards,
Hitoshi

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AM5716: UHS-I SDR104, 4-bit data, half-cycle Specs.