TMS320C6748: Matrix multiplication benchmark

Hi,

We are looking into this issue.

Can you please provide details for below?

1. What is the DSPLIB version you used?

2. What is the example you picked up for bench marking above results?

3. What is the Cache setting? (L1P/L1D/L2 Cache sizes)

4. Have you tried to any other cache settings and have the results to compare?

5. Is DDR cached? 

6. What is the DDR Speed?

7. Is the code (dsp library) used as is OR recompiled and rebuilt with any other compiler options? If yes, please share the details.

Thanks,

Aravind

Here are the info that you are asking for:

1. DSPLIB 3.4.0.0

2. The benchmarking code is something that I wrote. It looks like the following:

if (init == 0)

{

for (i=0; i<2*TEST_DIM; i++)

{

for (j=0; j<TEST_DIM; j++)

{

x1[i][j] = 1.0;

x2[i][j] = 2.0;

y[i][j] = 0.0;

}

}

init = 1;

}

time1 = Timestamp_get32();

switch (iter % 2)

{

case 0:

DSPF_sp_mat_mul(&x1[0][0], TEST_DIM, TEST_DIM, &x2[0][0], TEST_DIM, &y[0][0]);

break;

case 1:

DSPF_sp_mat_mul_cplx(&x1[0][0], TEST_DIM, TEST_DIM, &x2[0][0], TEST_DIM, &y[0][0]);

break;

case 2:

//DSPF_sp_mat_mul_gemm(&x1[0][0], 3.0, 1000, 100, &x2[0][0], 1000, &y[0][0]);

break;

case 3:

//DSPF_sp_mat_mul_gemm_cplx(&x1[0][0], 3.0, 1000, 50, &x2[0][0], 1000, &y[0][0]);

break;

case 4:

//DSPF_sp_mat_trans(&x1[0][0], 1000, 100, &y[0][0]);

break;

default:

break;

}

iter++;

time2 = Timestamp_get32();

delta1 = time2 - time1;

// printf("Time %u, %u => %u\n", time1, time2, delta1);

Timestamp_getFreq(&freq);

time1_ms = (float)delta1 * 1000.0 / (float)freq.lo;

printf("DSPF_sp_mat_mul : %f ms\n", time1_ms);

3. 32K/32K/128K

4. No

5. Yes

6. 144MHz

7. As is

Thanks for providing the details. From the code you shared, I see that, the benchmark application you are using is a SYS BIOS application.

Can you also please share,

The PROCESSOR-SDK-OMAPL138 release version (If I need to check for any other component versions)
SYS BIOS Version, XDC version that you used for your excercise.
RTSC cfg file for the application (if it is a RTSC application)
Lnk command file and the generated map file for the application
Any Custom platform and/or memory map
Is the LITTLE_ENDIAN code used or BIG_ENDIAN code used from the DSPLIB?

Can you go through below application note:
www.ti.com/.../sprabf2.pdf

Especially, the Compiler sections and Profiling Sections. The profiling sections in in the app note, is demonstrating the TSCL based benchmark. The TSCL information is the data in DSP Core Cycles.

Can you please provide the register dumps for below?
1. L2CFG regiser --> Can you make sure you have the L2MODE in L2CFG Cache set to maximum allowed. (value = 7)?
2. L1DCFG Register (Address: 0x01840040)
3. L1PCFG Level 1 Program Configuration Register (Addres: 0x01840020)

You can refer to C66x Corepac user guide for more details on above registers.
https://www.ti.com/lit/sprugw0

From the details, it appears to me that you are hitting the Cache misses for higher order matrix multiplications. So, it may be good for you to refer to TMS320C66x DSP Cache: (Literature Number: SPRUGY8): https://www.ti.com/lit/sprugy8

Is it possible for you to place DSPF_sp_mat_mul() and DSPF_sp_mat_mul_cplx() next to each other in memory using the linker command file and benchmark the results?

As per my understanding you are looking for getting the DSPLIB matrix multiplication effectively for large N values. As N gets large, you would have impact due to cache misses.

Here are some of the info that you are looking for.

The other stuff will take me a bit of time to obtain. But regarding to your suspicion on what may be the cause. I was suspecting the cache as well and that is what I am concerned with. If somehow the matrix multiplication function does not account for the cache limitation when the matrix size grows large and ends up causing a lot of cache thrashing, then really there is no easy way to do large matrix multiplication effectively on the DSP using the function as is.

We are in the middle of selecting a processor and the C6748 is just something that we already have so I was using it for a quick test. So given the fact that we are open for picking a different processor, will there be a processor/dsplib that can do large matrix multiplication effectively or do they all suffer the same limitation?

Thanks for the suggestion. I am aware of the divide and conquer method. I am just hoping that there is a version of the library that has that feature built-in. But if not, that is okay then. Thanks again for answering my questions.

By the way, is there an equivalent of a BLAS library that can be run on the DSP side?

Thanks. That is the information that I am looking for.

Hi Charles

Ok. 
Do let us know if you have more questions as you go through the processor/dsp selection. 

We are also soliciting feedback on areas to improve on DSPLIB for c66x family etc. 

Regards

Mukul